ALTERA_JTAG_UART(4)

💖 ALTERA_JTAG_UART(4) 💖

okay bestie, so this is a page from the Kernel Interfaces Manual — sit down, grab a boba, we're talking about the driver for the Altera JTAG UART Core ✨

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🌸 NAME 🌸

altera_jtag_uart — the driver for the Altera JTAG UART Core. that's it, that's the whole vibe 💅

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🎀 SYNOPSIS 🎀

device altera_jtag_uart

and in /boot/device.hints:

hint.altera_jtag_uart.0.at="nexus0"
hint.altera_jtag_uart.0.maddr=0x7f000000
hint.altera_jtag_uart.0.msize=0x40
hint.altera_jtag_uart.0.irq=0
hint.altera_jtag_uart.1.at="nexus0"
hint.altera_jtag_uart.1.maddr=0x7f001000
hint.altera_jtag_uart.1.msize=0x40

like yes, that's the whole setup, no notes 🫶

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🦋 DESCRIPTION 🦋

so the altera_jtag_uart device driver is the one giving you support for the Altera JTAG UART core, which — iconic behaviour — lets multiple UART-like streams get carried over JTAG. it's giving multitasking, it's giving range 🌈

and altera_jtag_uart lets those JTAG UART streams attach to both:

• the low-level console interface (the one used for direct kernel input and output, very main character), and
• the tty(4) layer, so you can use them with ttys(5) and login(1) 💖

sequential Altera JTAG UART devices will just show up as ttyu0, ttyu1, etc. counting up, cute, ordered, slay ✨

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🔥 HARDWARE 🔥

you can connect to Altera JTAG UART devices using Altera's nios2-terminal program, and you pick which instance with the --instance argument on the management host. periodt 💅

altera_jtag_uart supports JTAG UART cores with or without interrupt lines connected — so flexible, so demure. and if you omit the irq portion of the device.hints entry? the driver will poll instead of configuring interrupts. no irq, no problem 💜

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👑 SEE ALSO 👑

• login(1)
• tty(4)
• ttys(5)

Altera Embedded Peripherals IP User Guide, Altera Corporation, http://www.altera.com/literature/ug/ug_embedded_ip.pdf, June 2011. 📚

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🌟 HISTORY 🌟

the altera_jtag_uart device driver first appeared in FreeBSD 10.0. a debut, a moment, an era ✨

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🧚 AUTHORS 🧚

the altera_jtag_uart device driver and this manual page were developed by SRI International and the University of Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) (“CTSRD”), as part of the DARPA CRASH research programme. this device driver was written by Robert N. M. Watson. academic baddies fr fr 🎓💖

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💀 BUGS 💀

okay so this is the part where we get real 😭

altera_jtag_uart must dynamically poll to detect when JTAG is present, in order to disable flow control in the event that there is no receiving endpoint. if it didn't? the boot may hang waiting for the JTAG client to be attached, and user processes attached to JTAG UART devices might block indefinitely. not the vibe. not the moment.

but — and this is the tragic part — there is no way to flush the output buffer once JTAG is detected to have disappeared. which means a small amount of stale output data will remain in the output buffer, and it gets displayed by nios2-terminal when it's connected. leftover crumbs, we can't clean them up 🙈

also: loss of JTAG will not generate a hang-up event, because that is rarely the desired behaviour. it's a choice and it's an intentional one 💅

and one more thing: nios2-terminal does not place the client-side TTY in raw mode, so by default it will not pass all control characters through to the UART. so if some control chars are mysteriously missing, that's why, not you, you did nothing wrong 🫶

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literally every flag, hint, path and caveat is still in here, bestie. the facts ate, the vibe ate, and we didn't skip a single one. no cap. 💖

that's a wrap on this page from the Debian crew, dated August 18, 2012 — so retro, so iconic, ty for coming to my ted talk mwah 🎀✨