OPENSSL_PPCCAP(3SSL)

📦
version 4.0.3 · 5 versions
, in ubuntu stonking

💅 NAME 💅

OPENSSL_ppccap — the PowerPC processor capabilities vector, bestie. It's giving "which fancy PowerPC instructions can we use" and honestly it's iconic.

✨ SYNOPSIS ✨

env OPENSSL_ppccap=... <application>

Like, you just set it before you launch the app. That's the whole vibe.

🦋 DESCRIPTION 🦋

Okay so libcrypto supports PowerPC instruction set extensions, right? And each one of those extensions is represented by a bit in the PowerPC capabilities vector. When libcrypto initializes, it tucks the results returned by the PowerPC CPU capabilities detection logic into that vector. No cap. 🫶

Now the detection methods? OS-dependent, hunty. They use a combination of stuff the kernel gathered during boot plus probe functions that literally try to execute instructions and trap illegal instruction signals with a signal handler. Main character energy fr fr. 😭

If you wanna override the set of extensions available to an application, set the OPENSSL_ppccap environment variable before you start that application. It gets assigned a numerical value that denotes the bits in the PowerPC capabilities vector. And the ppc_arch.h header file says this, quote unquote: "Flags' usage can appear ambiguous, because they are set rather to reflect OpenSSL performance preferences than actual processor capabilities."

Multiple extensions? Enabled by logically OR-ing the values that represent the desired extensions. Math ate, periodt. 💅

⚠️ Notes, and listen up bestie: enabling an extension on a CPU that does not support the extension will result in a SIGILL crash. On AIX, all vector instructions can be disabled with the schedo -ro allow_vmx=0 command. DO NOT USE THIS COMMAND to disable vector instructions in the OS when it is running on a CPU level that supports the instructions without also disabling them in libcrypto via the OPENSSL_ppccap environment variable, or the application will crash with a SIGILL. Not the moment, okay? 💀

Currently, the following extensions are defined:

🌸 The Extension Lineup 🌸

  • 0x01
    • Name: PPC_FPU64
    • This flag is obsolete. Old. Ancient. Retired. 🙈
  • 0x02
    • Name: PPC_ALTIVEC
    • Meaning: use AltiVec (aka VMX) instructions. In some but not all cases, this capability gates the use of later ISA vector instructions. The associated probe instruction is vor (vector logical or).
    • Effect: enables use of vector instructions but does not enable extensions added at specific ISA levels. However — and this is the plot twist — disabling this capability disables a subset of vector extensions added at specific ISA levels even if they are otherwise enabled. 😳
  • 0x04
    • Name: PPC_CRYPTO207
    • Meaning: use instructions added in ISA level 2.07. The associated probe instruction is vcipher (vector AES cipher round).
    • Effect: enables AES, SHA-2 sigma, and other ISA 2.07 instructions for AES, SHA-2, GHASH, and Poly1305. Crypto slay. 🔥
  • 0x08
    • Name: PPC_FPU
    • Meaning: use FPU instructions. The associated probe instruction is fmr (floating move register).
    • Effect: enables Poly1305 FPU implementation. The PPC_CRYPTO207 capability overrides this effect. So like, know your hierarchy. 👑
  • 0x10
    • Name: PPC_MADD300
    • Meaning: use instructions added in ISA level 3.00. The associated probe instruction is maddhdu (multiply-add high doubleword unsigned).
    • Effect: enables use of the polynomial multiply and other ISA 3.00 instructions for AES-GCM, P-384, and P-521.
  • 0x20
    • Name: PPC_MFTB
    • Meaning: use the mftb (move from time base) instruction. The associated probe instruction is mftb.
    • Effect: enables use of the mftb instruction to sample the lower 32 bits of the CPU time base register in order to acquire entropy. Considered obsolete. The PPC_MFSPR268 capability overrides this capability. Sorry babe, you've been superseded. 💀
  • 0x40
    • Name: PPC_MFSPR268
    • Meaning: use the mfspr (move from special purpose register) instruction to read SPR 268. The associated probe instruction is mfspr 268.
    • Effect: enables use of the mfspr instruction to sample the lower 32 bits of the CPU time base register from SPR 268, the TBL (time base lower) register, in order to acquire entropy. Entropy queen. ✨
  • 0x80
    • Name: PPC_BRD31
    • Meaning: use instructions added in ISA level 3.1. The associated probe instruction is brd (byte-reverse doubleword).
    • Effect: enables use of ISA 3.1 instructions in ChaCha20. 🎀

🌈 RETURN VALUES 🌈

Not available. Yeah, nothing to report. It's giving mystery. 🧚

🍓 EXAMPLES 🍓

Check currently detected capabilities:

$ openssl info -cpusettings
OPENSSL_ppccap=0x2E

The detected capabilities in the above example indicate that PPC_MFTB, PPC_FPU, PPC_CRYPTO207, PPC_MFSPR268, and PPC_ALTIVEC are enabled. Look at her go. 👑

Disable all instruction set extensions:

OPENSSL_ppccap=0x00

Enable base AltiVec extensions:

OPENSSL_ppccap=0x02

Copyright 2025-2026 The OpenSSL Project Authors. All Rights Reserved.

Licensed under the Apache License 2.0 (the "License"). You may not use this file except in compliance with the License. You can obtain a copy in the file LICENSE in the source distribution or at <https://www.openssl.org/source/license.html>.

okay bestie that's the whole page, hope you understood it, mwah 💖

this was OPENSSL_PPCCAP(3SSL) from version 4.0.3, dated 2026-09-29 — thanks for reading, ily, go set your capabilities responsibly 🫶✨

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