avr_power(3avr)
π NAME π
avr_power β <avr/power.h>: Power Reduction Management π
fr fr this is the avr_power page from the 3avr manual, and it's basically the master switch panel for your microcontroller's power bill. bestie, we are turning things OFF. π
β¨ SYNOPSIS β¨
Macros
#define clock_prescale_get()
Functions
static void power_all_enable ()
static void power_all_disable ()
void clock_prescale_set (clock_div_t __x)
πΈ Detailed Description πΈ
#include <avr/power.h>
okay so here's the vibe π β lots of AVRs have a Power Reduction Register (PRR) or, like, several of them (PRRx), and what they do is let you cut power consumption by disabling or enabling all the different on-board peripherals whenever you feel like it. some devices also ship with the XTAL Divide Control Register (XDIV), which does pretty much the same kind of thing as the System Clock Prescale Register (CLKPR). iconic, honestly.
this header file is FULL of macros that give you an easy little interface to enable or disable on-board peripherals and lower that power draw. the whole list is right down below. β¬οΈ
π«Ά real talk though: - Not all AVR devices have a Power Reduction Register (for example theATmega8). On those devices without a Power Reduction Register, the power reduction macros are not available. π - Not all AVR devices contain the same peripherals (for example, the LCD interface), or they will be named differently (for example,USARTandUSART0). Please consult your device's datasheet, or the header file, to find out which macros are applicable to your device. π - For device using the XTAL Divide Control Register (XDIV), when prescaler is used, Timer/Counter0 can only be used in asynchronous mode. Keep in mind that Timer/Counter0 source shall be less than ΒΌth of peripheral clock. Therefore, when using a typical32.768 kHzcrystal, one shall not scale the clock below131.072 kHz. β°
π The Power Macro Table π
here's every single one, no skips, no cap:
power_aca_disable()β Disable the Analog Comparator on PortApower_aca_enable()β Enable the Analog Comparator on PortApower_adc_enable()β Enable the Analog to Digital Converter modulepower_adc_disable()β Disable the Analog to Digital Converter modulepower_adca_disable()β Disable the Analog to Digital Converter module on PortApower_adca_enable()β Enable the Analog to Digital Converter module on PortApower_evsys_disable()β Disable the EVSYS modulepower_evsys_enable()β Enable the EVSYS modulepower_hiresc_disable()β Disable the HIRES module on PortCpower_hiresc_enable()β Enable the HIRES module on PortCpower_lcd_enable()β Enable the LCD modulepower_lcd_disable()β Disable the LCD modulepower_pga_enable()β Enable the Programmable Gain Amplifier modulepower_pga_disable()β Disable the Programmable Gain Amplifier modulepower_pscr_enable()β Enable the Reduced Power Stage Controller modulepower_pscr_disable()β Disable the Reduced Power Stage Controller modulepower_psc0_enable()β Enable the Power Stage Controller 0 modulepower_psc0_disable()β Disable the Power Stage Controller 0 modulepower_psc1_enable()β Enable the Power Stage Controller 1 modulepower_psc1_disable()β Disable the Power Stage Controller 1 modulepower_psc2_enable()β Enable the Power Stage Controller 2 modulepower_psc2_disable()β Disable the Power Stage Controller 2 modulepower_ram0_enable()β Enable the SRAM block 0power_ram0_disable()β Disable the SRAM block 0power_ram1_enable()β Enable the SRAM block 1power_ram1_disable()β Disable the SRAM block 1power_ram2_enable()β Enable the SRAM block 2power_ram2_disable()β Disable the SRAM block 2power_ram3_enable()β Enable the SRAM block 3power_ram3_disable()β Disable the SRAM block 3power_rtc_disable()β Disable the RTC modulepower_rtc_enable()β Enable the RTC modulepower_spi_enable()β Enable the Serial Peripheral Interface modulepower_spi_disable()β Disable the Serial Peripheral Interface modulepower_spic_disable()β Disable the SPI module on PortCpower_spic_enable()β Enable the SPI module on PortCpower_spid_disable()β Disable the SPI module on PortDpower_spid_enable()β Enable the SPI module on PortDpower_tc0c_disable()β Disable the TC0 module on PortCpower_tc0c_enable()β Enable the TC0 module on PortCpower_tc0d_disable()β Disable the TC0 module on PortDpower_tc0d_enable()β Enable the TC0 module on PortDpower_tc0e_disable()β Disable the TC0 module on PortEpower_tc0e_enable()β Enable the TC0 module on PortEpower_tc0f_disable()β Disable the TC0 module on PortFpower_tc0f_enable()β Enable the TC0 module on PortFpower_tc1c_disable()β Disable the TC1 module on PortCpower_tc1c_enable()β Enable the TC1 module on PortCpower_twic_disable()β Disable the Two Wire Interface module on PortCpower_twic_enable()β Enable the Two Wire Interface module on PortCpower_twie_disable()β Disable the Two Wire Interface module on PortEpower_twie_enable()β Enable the Two Wire Interface module on PortEpower_timer0_enable()β Enable the Timer 0 modulepower_timer0_disable()β Disable the Timer 0 modulepower_timer1_enable()β Enable the Timer 1 modulepower_timer1_disable()β Disable the Timer 1 modulepower_timer2_enable()β Enable the Timer 2 modulepower_timer2_disable()β Disable the Timer 2 modulepower_timer3_enable()β Enable the Timer 3 modulepower_timer3_disable()β Disable the Timer 3 modulepower_timer4_enable()β Enable the Timer 4 modulepower_timer4_disable()β Disable the Timer 4 modulepower_timer5_enable()β Enable the Timer 5 modulepower_timer5_disable()β Disable the Timer 5 modulepower_twi_enable()β Enable the Two Wire Interface modulepower_twi_disable()β Disable the Two Wire Interface modulepower_usart_enable()β Enable the USART modulepower_usart_disable()β Disable the USART modulepower_usart0_enable()β Enable the USART 0 modulepower_usart0_disable()β Disable the USART 0 modulepower_usart1_enable()β Enable the USART 1 modulepower_usart1_disable()β Disable the USART 1 modulepower_usart2_enable()β Enable the USART 2 modulepower_usart2_disable()β Disable the USART 2 modulepower_usart3_enable()β Enable the USART 3 modulepower_usart3_disable()β Disable the USART 3 modulepower_usartc0_disable()β Disable the USART0 module on PortCpower_usartc0_enable()β Enable the USART0 module on PortCpower_usartd0_disable()β Disable the USART0 module on PortDpower_usartd0_enable()β Enable the USART0 module on PortDpower_usarte0_disable()β Disable the USART0 module on PortEpower_usarte0_enable()β Enable the USART0 module on PortEpower_usartf0_disable()β Disable the USART0 module on PortFpower_usartf0_enable()β Enable the USART0 module on PortFpower_usb_enable()β Enable the USB modulepower_usb_disable()β Disable the USB modulepower_usi_enable()β Enable the Universal Serial Interface modulepower_usi_disable()β Disable the Universal Serial Interface modulepower_vadc_enable()β Enable the Voltage ADC modulepower_vadc_disable()β Disable the Voltage ADC modulepower_all_enable()β Enable all modulespower_all_disable()β Disable all modules
π°οΈ Clock Prescaling, the Other Half of the Story π°οΈ
so some of the newer AVRs contain a System Clock Prescale Register (CLKPR) that allows you to decrease the system clock frequency and the power consumption when the need for processing power is low. lowkey the move. π€
and on some earlier AVRs (ATmega103, ATmega64, ATmega128), similar functionality can be achieved through the XTAL Divide Control Register. below are two macros and an enumerated type that can be used to interface to the Clock Prescale Register or XTAL Divide Control Register.
β οΈ Not all AVR devices have a clock prescaler. On those devices without a Clock Prescale Register or XTAL Divide Control Register, these macros are not available. π
Clock prescaler setting enumerations for device using System Clock Prescale Register:
typedef enum
{
clock_div_1 = 0,
clock_div_2 = 1,
clock_div_4 = 2,
clock_div_8 = 3,
clock_div_16 = 4,
clock_div_32 = 5,
clock_div_64 = 6,
clock_div_128 = 7,
clock_div_256 = 8,
clock_div_1_rc = 15, // ATmega128RFA1 only
} clock_div_t;
Clock prescaler setting enumerations for device using XTAL Divide Control Register:
typedef enum
{
clock_div_1 = 1,
clock_div_2 = 2,
clock_div_4 = 4,
clock_div_8 = 8,
clock_div_16 = 16,
clock_div_32 = 32,
clock_div_64 = 64,
clock_div_128 = 128
} clock_div_t;
π Macro Definition Documentation π
#define clock_prescale_get()
Value:
(clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)|(1<<CLKPS3)))
Gets and returns the clock prescaler register setting. β¨ the return type is clock_div_t.
π¨ okay so for device with XTAL Divide Control Register (XDIV), return can actually range from1to129. Care should be taken has the return value could differ from the typedef enumclock_div_t. This should only happen ifclock_prescale_setwas previously called with a value other than those defined byclock_div_t. so likeβ¦ watch out π
π Function Documentation π
void clock_prescale_set (clock_div_t x)
Set the clock prescaler register select bits, selecting a system clock division setting. this function is inlined, even if compiler optimizations are disabled. she works regardless. π
the type of x is clock_div_t.
π¨ for device with XTAL Divide Control Register (XDIV),xcan actually range from1to129. Thus, one does not need to useclock_div_ttype as argument. okayyy loophole π
void power_all_disable () [inline], [static]
Disable all modules. everything. the whole party. lights out. ππ«Ά
void power_all_enable () [inline], [static]
Enable all modules. the party's back on. π
π Author π
Generated automatically by Doxygen for AVR-LibC from the source code. yeah bestie, a robot wrote this one, not me β I just gave it the sparkle it deserved. π€β¨
and that's the whole page, cutie π«Ά this was AVR-LibC, Version 2.2.1, from the avr_power(3avr) manual β now go turn some peripherals off and save that battery, periodt. ππ
π¦ where this page comes from
- ubuntu resolute: avr-libc 1:2.2.1-1build1 Β· BSD-3-Clause
- ubuntu stonking: avr-libc 1:2.2.1-1build1 Β· BSD-3-Clause
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash on : a language model's rewrite of the original, under its terms