DPGEN_SFF(3)

πŸ“¦ version 5.1.1-unstable-2025-02, in nixos 26.05, nixpkgs unstable

🌸 DPGEN_SFF β€” Static Flip-Flop Macro-Generator 🌸

okay bestie, welcome to the genlib section of the manual β€” this one is DPGEN_SFF from the Alliance - genlib User's Manual and it's literally the blueprint for building static flip-flops. periodt. πŸ’–


✨ SYNOPSIS ✨

#include  <genlib.h>

void GENLIB_MACRO (DPGEN_SFF, char *modelname, long flags, long N);

πŸ¦‹ DESCRIPTION πŸ¦‹

So what it does: it generates a N bits static flip-flop named modelname. and when we say static, we mean both latches inside this flip-flop are static β€” each one is made of two inverters looped together. no cap, that's the whole vibe of it. πŸ”₯

How it works :

  • wen when set to '1' enables the writing of the flip-flop.

πŸŽ€ TERMINAL NAMES πŸŽ€

here's the full roster of terminals, bestie, all six of them, in order:

  1. wen : write enable (1 bit).
  2. ck : clock signal (1 bit).
  3. i0 : data input (N bits).
  4. q : output (N bits).
  5. vdd : power.
  6. vss : ground.

🌈 EXAMPLE 🌈

okay this is the part where it all comes together, look:

GENLIB_MACRO(DPGEN_SFF, "model_sff_32"
                      , F_BEHAV|F_PLACE
                      , 32
                      );

GENLIB_LOINS( "model_sff_32"
            , "instance1_sff_32"
            , "wen"
            , "ck"
            , "i0[31:0]"
            ,  "q[31:0]"
            , "vdd", "vss", NULL
            );

like… it ate. πŸ’… 32 bits, F_BEHAV|F_PLACE flags, and the instance wired up with wen, ck, i0[31:0], q[31:0], vdd and vss. iconic behaviour honestly.


πŸ‘‘ SEE ALSO πŸ‘‘


ngl if you got this far you're genuinely built different 🫢 go read GENLIB_MACRO(3) next, iykyk.

this page came from ASIM/LIP6, dated 30 July 2004 β€” yeah it's a vintage icon, it was serving before most of us could walk, and it's still slaying. β­πŸ§šπŸ’œ

πŸ“¦ where this page comes from