DPGEN_NAND4(3)

πŸ“¦ version 5.1.1-unstable-2025-02, in nixos 26.05, nixpkgs unstable

πŸ’– DPGEN_NAND4 πŸ’–

okay bestie, so this is a page from the Alliance - genlib User's Manual β€” yes, a whole manual, and this is literally the NAND4 Macro-Generator entry. iykyk. sit down, hydrate, we're doing silicon 🧚✨


✨ NAME ✨

DPGEN_NAND4 β€” the NAND4 Macro-Generator, aka the girl who makes you a four-input NAND. no cap. πŸŽ€


🌸 SYNOPSIS 🌸

#include  <genlib.h>

void GENLIB_MACRO (DPGEN_NAND4, char *modelname, long flags, long N,
long drive);

πŸ¦‹ DESCRIPTION πŸ¦‹

She generates an N bits four inputs NAND with an output power of drive, and you get to name her modelname. main character behaviour fr fr πŸ’…

the valid drive values are literally just: 1 or 4. that's the list. that's it. don't get cute with it πŸ™ˆ

🌈 TERMINAL NAMES 🌈

here's the whole cast, in order, no skips:

  1. i3 β€” input.
  2. i2 β€” input.
  3. i1 β€” input.
  4. i0 β€” input.
  5. nq β€” output.
  6. vdd β€” power.
  7. vss β€” ground.

⭐ BEHAVIOR ⭐

nq <= not(i0 and i1 and i2 and i3)

that's the vibe. the whole vibe. πŸ’œ


πŸ”₯ EXAMPLE πŸ”₯

GENLIB_MACRO(DPGEN_NAND4, "model_nand4_32"
                        , F_BEHAV|F_PLACE
                        , 32
                        , 1
                        );

GENLIB_LOINS( "model_nand4_32"
            , "instance1_nand4_32"
            , "i3[31:0]"
            , "i2[31:0]"
            , "i1[31:0]"
            , "i0[31:0]"
            , "nq[31:0]"
            , "vdd", "vss", NULL
            );

she ate that. 32 whole bits of nand. obsessed πŸ˜­πŸ’–


πŸ‘‘ SEE ALSO πŸ‘‘


reminder bestie: GENLIB_MACRO wants drive to be 1 or 4 β€” anything else is not the move. periodt. πŸ’…

mwah, that's the page 🫢 this gem came from ASIM/LIP6, dated 30 July 2004 β€” yes she's an elder icon and she still slays πŸ’€βœ¨ bye bestie, go generate some macros 🌸

πŸ“¦ where this page comes from