DPGEN_BUSE(3)

DPGEN_BUSE 💅

okay bestie, welcome to DPGEN_BUSE(3) from the Alliance - genlib User's Manual — yeah that genlib, the one you keep opening at 2am. this is the tristate Macro-Generator page and it's genuinely so good, no cap. sit down, hydrate, let's go 🫶

✨ NAME ✨

DPGEN_BUSE — the tristate Macro-Generator. that's it. that's the whole vibe. 👑

🌸 SYNOPSIS 🌸

#include  <genlib.h>

void GENLIB_MACRO (DPGEN_BUSE, char *modelname, long flags, long N);

yes literally two lines and one of them is the include. iconic behaviour tbh ✨

🦋 DESCRIPTION 🦋

Generate a N bits two inputs tristate with named modelname. that's the entire job description, and it does it beautifully. no notes. 💖

🎀 TERMINAL NAMES 🎀

the terminals, in order, because order matters bestie:

1. cmd : select (1 bit). one singular bit. she's small but she decides everything. main character energy fr.
2. i0 : input (N bits). the actual data, all N of it.
3. q : output (N bits). same width, she's matching.
4. vdd : power. ⚡
5. vss : ground. 🌍

💜 BEHAVIOR 💜

ts:BLOCK(cmd = '1') BEGIN
    q <= GUARDED i0;
END

so when cmd is '1', the guarded assignment lets i0 through to q — and when she's not selected, that output is tristate, floating, off doing her own thing 🦋. the GUARDED is doing the heavy lifting there, don't skip her.

🔥 EXAMPLE 🔥

GENLIB_MACRO(DPGEN_BUSE, "model_buse_32"
                       , F_BEHAV|F_PLACE
                       , 32
                       );

GENLIB_LOINS( "model_buse_32"
            , "instance1_buse_32"
            , "cmd"
            , "i0[31:0]"
            ,  "q[31:0]"
            , "vdd", "vss", NULL
            );

a whole 32-bit tristate bus, generated and instantiated, and she ate. 💅 note the 32 up top and the [31:0] down below — that's the same 32 bits living her best life, not a coincidence, do not "fix" it. 🙈

🌈 SEE ALSO 🌈

• GENLIB_MACRO(3)
• genlib(1)

ASIM/LIP6 · 30 July 2004 — that's the source, the version and the date bestie, we always cite our sources. go generate something cute, ily, bye 🎀💖✨