libnvme(2)

πŸ’– NAME πŸ’–

enum nvme_register_offsets β€” bestie, this is the controller registers list, and it covers all the transports, no cap. Think of it as the layout of BAR0/1 for PCIe, and the properties for fabrics. That's the whole vibe. πŸ‘‘


✨ SYNOPSIS ✨

Okay so here's the whole enum, and yes, we're listing every single one because every single one matters:

enum nvme_register_offsets {
    NVME_REG_CAP ,
    NVME_REG_VS ,
    NVME_REG_INTMS ,
    NVME_REG_INTMC ,
    NVME_REG_CC ,
    NVME_REG_CSTS ,
    NVME_REG_NSSR ,
    NVME_REG_AQA ,
    NVME_REG_ASQ ,
    NVME_REG_ACQ ,
    NVME_REG_CMBLOC ,
    NVME_REG_CMBSZ ,
    NVME_REG_BPINFO ,
    NVME_REG_BPRSEL ,
    NVME_REG_BPMBL ,
    NVME_REG_CMBMSC ,
    NVME_REG_CMBSTS ,
    NVME_REG_CMBEBS ,
    NVME_REG_CMBSWTP ,
    NVME_REG_NSSD ,
    NVME_REG_CRTO ,
    NVME_REG_PMRCAP ,
    NVME_REG_PMRCTL ,
    NVME_REG_PMRSTS ,
    NVME_REG_PMREBS ,
    NVME_REG_PMRSWTP ,
    NVME_REG_PMRMSCL ,
    NVME_REG_PMRMSCU

};

πŸŽ€ Constants πŸŽ€

Grab a snack, we're going through all twenty-eight of them, one by one, zero skips, periodt. 🫢

  • NVME_REG_CAP β€” Controller Capabilities πŸ’… the "what can u even do" register
  • NVME_REG_VS β€” Version πŸ¦‹
  • NVME_REG_INTMS β€” Interrupt Mask Set πŸ”₯
  • NVME_REG_INTMC β€” Interrupt Mask Clear 🧹
  • NVME_REG_CC β€” Controller Configuration πŸŽ›οΈ
  • NVME_REG_CSTS β€” Controller Status πŸ‘€
  • NVME_REG_NSSR β€” NVM Subsystem Reset πŸ”„
  • NVME_REG_AQA β€” Admin Queue Attributes πŸ“‹
  • NVME_REG_ASQ β€” Admin SQ Base Address πŸ“
  • NVME_REG_ACQ β€” Admin CQ Base Address πŸ“
  • NVME_REG_CMBLOC β€” Controller Memory Buffer Location πŸ—ΊοΈ
  • NVME_REG_CMBSZ β€” Controller Memory Buffer Size πŸ“
  • NVME_REG_BPINFO β€” Boot Partition Information πŸ₯Ύ
  • NVME_REG_BPRSEL β€” Boot Partition Read Select 🎯
  • NVME_REG_BPMBL β€” Boot Partition Memory Buffer Location πŸ“Œ
  • NVME_REG_CMBMSC β€” Controller Memory Buffer Memory Space Control πŸ•ΉοΈ
  • NVME_REG_CMBSTS β€” Controller Memory Buffer Status πŸ“Š
  • NVME_REG_CMBEBS β€” Controller Memory Buffer Elasticity Buffer Size 🫧
  • NVME_REG_CMBSWTP β€” Controller Memory Buffer Sustained Write Throughput πŸƒβ€β™€οΈ
  • NVME_REG_NSSD β€” NVM Subsystem Shutdown πŸ›‘
  • NVME_REG_CRTO β€” Controller Ready Timeouts ⏰
  • NVME_REG_PMRCAP β€” Persistent Memory Capabilities 🧠
  • NVME_REG_PMRCTL β€” Persistent Memory Region Control 🎚️
  • NVME_REG_PMRSTS β€” Persistent Memory Region Status πŸ“ˆ
  • NVME_REG_PMREBS β€” Persistent Memory Region Elasticity Buffer Size 🫧
  • NVME_REG_PMRSWTP β€” Memory Region Sustained Write Throughput πŸƒ
  • NVME_REG_PMRMSCL β€” Persistent Memory Region Controller Memory Space Control Lower ⬇️
  • NVME_REG_PMRMSCU β€” Persistent Memory Region Controller Memory Space Control Upper ⬆️

okay bestie that's literally the whole page, 28 for 28, nothing left out, we ate and left no crumbs πŸ’–βœ¨ and before u go β€” this was the enum nvme_register_offsets page of the libnvme API Manual, dated July 2026, and it's giving libnvme(2) energy. slay, bye πŸŽ€πŸ¦‹πŸ’œ

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