libnvme(9)

πŸ“¦ version 3.2, in arch rolling

πŸ’» libnvme(9) β€” the enum that maps every controller register, bestie

okay so this is the <pink>libnvme</pink> API manual page, and today's main character is enum nvme_register_offsets β€” the controller registers for all transports. Like, this is the layout of BAR0/1 for PCIe, and the properties for fabrics. One enum to rule them all, no cap. πŸ‘‘


✨ NAME ✨

enum nvme_register_offsets β€” controller registers for all transports. This is the layout of BAR0/1 for PCIe, and properties for fabrics.

πŸ¦‹ SYNOPSIS πŸ¦‹

enum nvme_register_offsets {
    NVME_REG_CAP ,
    NVME_REG_VS ,
    NVME_REG_INTMS ,
    NVME_REG_INTMC ,
    NVME_REG_CC ,
    NVME_REG_CSTS ,
    NVME_REG_NSSR ,
    NVME_REG_AQA ,
    NVME_REG_ASQ ,
    NVME_REG_ACQ ,
    NVME_REG_CMBLOC ,
    NVME_REG_CMBSZ ,
    NVME_REG_BPINFO ,
    NVME_REG_BPRSEL ,
    NVME_REG_BPMBL ,
    NVME_REG_CMBMSC ,
    NVME_REG_CMBSTS ,
    NVME_REG_CMBEBS ,
    NVME_REG_CMBSWTP ,
    NVME_REG_NSSD ,
    NVME_REG_CRTO ,
    NVME_REG_PMRCAP ,
    NVME_REG_PMRCTL ,
    NVME_REG_PMRSTS ,
    NVME_REG_PMREBS ,
    NVME_REG_PMRSWTP ,
    NVME_REG_PMRMSCL ,
    NVME_REG_PMRMSCU

};

🌸 Constants 🌸

bestie, here's the full roster β€” every single one, in order, nothing skipped, we don't do that here πŸ’…

  • NVME_REG_CAP β€” Controller Capabilities. the vibe check of the whole controller honestly
  • NVME_REG_VS β€” Version
  • NVME_REG_INTMS β€” Interrupt Mask Set
  • NVME_REG_INTMC β€” Interrupt Mask Clear
  • NVME_REG_CC β€” Controller Configuration
  • NVME_REG_CSTS β€” Controller Status
  • NVME_REG_NSSR β€” NVM Subsystem Reset
  • NVME_REG_AQA β€” Admin Queue Attributes
  • NVME_REG_ASQ β€” Admin SQ Base Address
  • NVME_REG_ACQ β€” Admin CQ Base Address
  • NVME_REG_CMBLOC β€” Controller Memory Buffer Location
  • NVME_REG_CMBSZ β€” Controller Memory Buffer Size
  • NVME_REG_BPINFO β€” Boot Partition Information
  • NVME_REG_BPRSEL β€” Boot Partition Read Select
  • NVME_REG_BPMBL β€” Boot Partition Memory Buffer Location
  • NVME_REG_CMBMSC β€” Controller Memory Buffer Memory Space Control
  • NVME_REG_CMBSTS β€” Controller Memory Buffer Status
  • NVME_REG_CMBEBS β€” Controller Memory Buffer Elasticity Buffer Size
  • NVME_REG_CMBSWTP β€” Controller Memory Buffer Sustained Write Throughput
  • NVME_REG_NSSD β€” NVM Subsystem Shutdown
  • NVME_REG_CRTO β€” Controller Ready Timeouts
  • NVME_REG_PMRCAP β€” Persistent Memory Capabilities
  • NVME_REG_PMRCTL β€” Persistent Memory Region Control
  • NVME_REG_PMRSTS β€” Persistent Memory Region Status
  • NVME_REG_PMREBS β€” Persistent Memory Region Elasticity Buffer Size
  • NVME_REG_PMRSWTP β€” Memory Region Sustained Write Throughput
  • NVME_REG_PMRMSCL β€” Persistent Memory Region Controller Memory Space Control Lower
  • NVME_REG_PMRMSCU β€” Persistent Memory Region Controller Memory Space Control Upper
fr fr, that's all 28 of them β€” CAP all the way through PMRMSCU. memorize them? no. reference them? absolutely, that's the whole point 🫢

okay that's the page!! slay 🌈 this was enum nvme_register_offsets from the libnvme(9) API Manual β€” brought to you by libnvme, dated October 2026, version vibes included, mwah πŸ’–πŸŽ€

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