libnvme(2)

💖 NAME 💖

okay so this is from the libnvme manual, section 2 (that's the API Manual bestie, not some random command) — and it's all about enum nvme_lm_queue_attributes, aka I/O Submission and I/O Completion Queue Attributes. literally just the attribute bits for the queues. slay. 💅

---

✨ SYNOPSIS ✨

here's the enum in all its glory, no cap:

enum nvme_lm_queue_attributes {
    NVME_LM_IOSQPC_MASK ,
    NVME_LM_IOSQPC_SHIFT ,
    NVME_LM_IOSQPRIO_MASK ,
    NVME_LM_IOSQPRIO_SHIFT ,
    NVME_LM_IOCQPC_MASK ,
    NVME_LM_IOCQPC_SHIFT ,
    NVME_LM_IOCQIEN_MASK ,
    NVME_LM_IOCQIEN_SHIFT ,
    NVME_LM_S0PT_MASK ,
    NVME_LM_S0PT_SHIFT ,
    NVME_LM_IOCQIV_MASK ,
    NVME_LM_IOCQIV_SHIFT

};

---

🎀 Constants 🎀

🌸 the I/O submission queue ones 🌸

• NVME_LM_IOSQPC_MASK — the mask that gets you the Physically Contiguous (PC) bit for this I/O submission queue. she's a mask, she masks. ✨
• NVME_LM_IOSQPC_SHIFT — the shift that gets you the PC bit for this I/O submission queue. (yes there's a mask and a shift, that's just the vibe.)
• NVME_LM_IOSQPRIO_MASK — the mask that gets you the Priority for this I/O submission queue. priorities, we love a queue that knows what she wants. 👑
• NVME_LM_IOSQPRIO_SHIFT — the shift that gets you the Priority for this I/O submission queue.

🦋 and now the I/O completion queue ones 🦋

• NVME_LM_IOCQPC_MASK — the mask that gets you the Physicaly Contiguous (PC) bit for this I/O completion queue.

not me typing Physicaly — that's literally how it's spelled in the original, bestie, I'm just the messenger 🙈 it means the same thing, the PC bit for the completion queue.

• NVME_LM_IOCQPC_SHIFT — the shift that gets you the PC bit for this I/O completion queue.
• NVME_LM_IOCQIEN_MASK — the mask that gets you the Interrupts Enabled bit for this I/O completion queue.
• NVME_LM_IOCQIEN_SHIFT — the shift that gets you the Interrupts Enabled bit for this I/O completion.
• NVME_LM_S0PT_MASK — the mask that gets you the value of the Phase Tag bit for Slot 0 of this I/O completion queue. slot zero specifically. main character slot energy. ⭐
• NVME_LM_S0PT_SHIFT — the shift that gets you the value of the Phase Tag bit for Slot 0 of this I/O completion queue.
• NVME_LM_IOCQIV_MASK — the mask that gets you the Interrupt Vector (IV) for this I/O completion queue.
• NVME_LM_IOCQIV_SHIFT — the shift that gets you the IV for this I/O completion queue.

---

fr fr, that's the whole thing: masks to pull the bits out, shifts to slide them down to where you can actually read them. every. single. one. listed. no skips. 💯

---

okay bestie that's the whole page 🫶 this little gem is from enum nvme_lm_queue_attributes in the libnvme(2) API Manual, dated July 2026 — go get your bits, ily, bye 💖✨🎀