libnvme(9)
π
libnvme(9) β okay bestie, let's talk about enum nvme_lm_queue_attributes
Hi hi hiii π«Ά so this is a page from the libnvme API manual (section 9, iykyk), and today's main character is this enum. Lowkey it's a whole vibe check for how the controller tells you stuff about its I/O submission and I/O completion queues β masks and shifts, masks and shifts, that's the energy. Let's get into it β¨
πΈ NAME
enum nvme_lm_queue_attributes β I/O Submission and I/O Completion Queue Attributes.
That's it, that's the name. Short, iconic, does exactly what it says on the tin π
π¦ SYNOPSIS
enum nvme_lm_queue_attributes {
NVME_LM_IOSQPC_MASK ,
NVME_LM_IOSQPC_SHIFT ,
NVME_LM_IOSQPRIO_MASK ,
NVME_LM_IOSQPRIO_SHIFT ,
NVME_LM_IOCQPC_MASK ,
NVME_LM_IOCQPC_SHIFT ,
NVME_LM_IOCQIEN_MASK ,
NVME_LM_IOCQIEN_SHIFT ,
NVME_LM_S0PT_MASK ,
NVME_LM_S0PT_SHIFT ,
NVME_LM_IOCQIV_MASK ,
NVME_LM_IOCQIV_SHIFT
};
Twelve entries, all dressed up with nowhere to go except straight into your bit-twiddling β¨ Every one of them is either a _MASK or a _SHIFT, and honestly? That's the whole personality.
π Constants
Grab a snack π β here's every single one, no skips, no cap.
NVME_LM_IOSQPC_MASKβ the mask that snags the Physically Contiguous (PC) bit for this I/O submission queue.NVME_LM_IOSQPC_SHIFTβ the shift that gets you the PC bit for this I/O submission queue.NVME_LM_IOSQPRIO_MASKβ the mask that pulls out the Priority for this I/O submission queue.NVME_LM_IOSQPRIO_SHIFTβ the shift that gets you the Priority for this I/O submission queue.NVME_LM_IOCQPC_MASKβ the mask for the Physicaly Contiguous (PC) bit for this I/O completion queue.
π«Ά tiny heads-up: yes, the original spells it "Physicaly" β that's literally how it's written in the doc, so we're keeping it exactly as-is. No autocorrect in this house π
NVME_LM_IOCQPC_SHIFTβ the shift that gets you the PC bit for this I/O completion queue.NVME_LM_IOCQIEN_MASKβ the mask that grabs the Interrupts Enabled bit for this I/O completion queue.NVME_LM_IOCQIEN_SHIFTβ the shift that gets you the Interrupts Enabled bit for this I/O completion.NVME_LM_S0PT_MASKβ the mask that fishes out the value of the Phase Tag bit for Slot 0 of this I/O completion queue.NVME_LM_S0PT_SHIFTβ the shift that gets you the value of the Phase Tag bit for Slot 0 of this I/O completion queue.NVME_LM_IOCQIV_MASKβ the mask that pulls the Interrupt Vector (IV) for this I/O completion queue.NVME_LM_IOCQIV_SHIFTβ the shift that gets you the IV for this I/O completion queue.
Mask then shift, mask then shift β it's giving choreography π₯ You & with the mask, you >> by the shift, and boom, the field is yours. That's the pattern for every single pair up there, no exceptions, fr fr.
π That's the whole page bestie β all twelve constants, accounted for, nothing dropped. Go forth and bit-twiddle responsibly.
And that's a wrap! π This was libnvme(9) β source/version is libnvme, dated October 2026 π mwah, drink some water, and may your queues always be properly masked πππ¦
π¦ where this page comes from
- arch rolling: nvme-cli 3.2-1 Β· GPL-2.0-or-later
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms