libnvme(9)
π libnvme(9) β part one, bestie π
okay so. this is a page from the libnvme API manual, section 9, and before you panic at the size of it: it's literally just one enum. one. that's the whole page. we're gonna get through it together π«Ά
πΈ NAME πΈ
enum nvme_feat β the Features Access Shifts/Masks values.
that's it, that's the name. it's giving "I contain multitudes" because there are so many constants in here, but the job description is exactly one line: these are the shift and mask values for feature access. β¨
π¦ SYNOPSIS π¦
so the way this works is chef's kiss simple lowkey: for basically every NVMe feature, there's a <THING>_SHIFT constant and a matching <THING>_MASK constant, all chillin' in one enum. you take a value, you shift it, you mask it, you're done. iconic behaviour honestly π
and then there are a handful of absolute renegades in here that show up without a _MASK sibling β those are just vibing on their own, no cap, and yes you will spot them on the way down π
here's the whole thing, character for character, exactly as the header has it:
enum nvme_feat {
NVME_FEAT_ARBITRATION_BURST_SHIFT ,
NVME_FEAT_ARBITRATION_BURST_MASK ,
NVME_FEAT_ARBITRATION_LPW_SHIFT ,
NVME_FEAT_ARBITRATION_LPW_MASK ,
NVME_FEAT_ARBITRATION_MPW_SHIFT ,
NVME_FEAT_ARBITRATION_MPW_MASK ,
NVME_FEAT_ARBITRATION_HPW_SHIFT ,
NVME_FEAT_ARBITRATION_HPW_MASK ,
NVME_FEAT_PWRMGMT_PS_SHIFT ,
NVME_FEAT_PWRMGMT_PS_MASK ,
NVME_FEAT_PWRMGMT_WH_SHIFT ,
NVME_FEAT_PWRMGMT_WH_MASK ,
NVME_FEAT_PWRMGMT_IIELL_SHIFT ,
NVME_FEAT_PWRMGMT_IIELL_MASK ,
NVME_FEAT_LBAR_NR_SHIFT ,
NVME_FEAT_LBAR_NR_MASK ,
NVME_FEAT_TT_TMPTH_SHIFT ,
NVME_FEAT_TT_TMPTH_MASK ,
NVME_FEAT_TT_TMPSEL_SHIFT ,
NVME_FEAT_TT_TMPSEL_MASK ,
NVME_FEAT_TT_THSEL_SHIFT ,
NVME_FEAT_TT_THSEL_MASK ,
NVME_FEAT_TT_TMPTHH_SHIFT ,
NVME_FEAT_TT_TMPTHH_MASK ,
NVME_FEAT_ERROR_RECOVERY_TLER_SHIFT ,
NVME_FEAT_ERROR_RECOVERY_TLER_MASK ,
NVME_FEAT_ERROR_RECOVERY_DULBE_SHIFT ,
NVME_FEAT_ERROR_RECOVERY_DULBE_MASK ,
NVME_FEAT_VWC_WCE_SHIFT ,
NVME_FEAT_VWC_WCE_MASK ,
NVME_FEAT_NRQS_NSQR_SHIFT ,
NVME_FEAT_NRQS_NSQR_MASK ,
NVME_FEAT_NRQS_NCQR_SHIFT ,
NVME_FEAT_NRQS_NCQR_MASK ,
NVME_FEAT_IRQC_THR_SHIFT ,
NVME_FEAT_IRQC_THR_MASK ,
NVME_FEAT_IRQC_TIME_SHIFT ,
NVME_FEAT_IRQC_TIME_MASK ,
NVME_FEAT_ICFG_IV_SHIFT ,
NVME_FEAT_ICFG_IV_MASK ,
NVME_FEAT_ICFG_CD_SHIFT ,
NVME_FEAT_ICFG_CD_MASK ,
NVME_FEAT_WA_DN_SHIFT ,
NVME_FEAT_WA_DN_MASK ,
NVME_FEAT_AE_SMART_SHIFT ,
NVME_FEAT_AE_SMART_MASK ,
NVME_FEAT_AE_NAN_SHIFT ,
NVME_FEAT_AE_NAN_MASK ,
NVME_FEAT_AE_FW_SHIFT ,
NVME_FEAT_AE_FW_MASK ,
NVME_FEAT_AE_TELEM_SHIFT ,
NVME_FEAT_AE_TELEM_MASK ,
NVME_FEAT_AE_ANA_SHIFT ,
NVME_FEAT_AE_ANA_MASK ,
NVME_FEAT_AE_PLA_SHIFT ,
NVME_FEAT_AE_PLA_MASK ,
NVME_FEAT_AE_LBAS_SHIFT ,
NVME_FEAT_AE_LBAS_MASK ,
NVME_FEAT_AE_EGA_SHIFT ,
NVME_FEAT_AE_EGA_MASK ,
NVME_FEAT_AE_NNSSHDN_SHIFT ,
NVME_FEAT_AE_NNSSHDN_MASK ,
NVME_FEAT_AE_TTHRY_SHIFT ,
NVME_FEAT_AE_TTHRY_MASK ,
NVME_FEAT_AE_RASSN_SHIFT ,
NVME_FEAT_AE_RASSN_MASK ,
NVME_FEAT_AE_RGRP0_SHIFT ,
NVME_FEAT_AE_RGRP0_MASK ,
NVME_FEAT_AE_ANSAN_SHIFT ,
NVME_FEAT_AE_ANSAN_MASK ,
NVME_FEAT_AE_CCRCN_SHIFT ,
NVME_FEAT_AE_CCRCN_MASK ,
NVME_FEAT_AE_LHCN_SHIFT ,
NVME_FEAT_AE_LHCN_MASK ,
NVME_FEAT_AE_RLCCN_SHIFT ,
NVME_FEAT_AE_RLCCN_MASK ,
NVME_FEAT_AE_ZDCN_SHIFT ,
NVME_FEAT_AE_ZDCN_MASK ,
NVME_FEAT_AE_PMDRLPCN_SHIFT ,
NVME_FEAT_AE_PMDRLPCN_MASK ,
NVME_FEAT_AE_ADLPCN_SHIFT ,
NVME_FEAT_AE_ADLPCN_MASK ,
NVME_FEAT_AE_HDLPCN_SHIFT ,
NVME_FEAT_AE_HDLPCN_MASK ,
NVME_FEAT_AE_DLPCN_SHIFT ,
NVME_FEAT_AE_DLPCN_MASK ,
NVME_FEAT_APST_APSTE_SHIFT ,
NVME_FEAT_APST_APSTE_MASK ,
NVME_FEAT_HMEM_EHM_SHIFT ,
NVME_FEAT_HMEM_EHM_MASK ,
NVME_FEAT_KATO_TIMEOUT_SHIFT ,
NVME_FEAT_KATO_TIMEOUT_MASK ,
NVME_FEAT_HCTM_TMT2_SHIFT ,
NVME_FEAT_HCTM_TMT2_MASK ,
NVME_FEAT_HCTM_TMT1_SHIFT ,
NVME_FEAT_HCTM_TMT1_MASK ,
NVME_FEAT_NOPS_NOPPME_SHIFT ,
NVME_FEAT_NOPS_NOPPME_MASK ,
NVME_FEAT_RRL_NVMSETID_SHIFT ,
NVME_FEAT_RRL_NVMSETID_MASK ,
NVME_FEAT_RRL_RRL_SHIFT ,
NVME_FEAT_RRL_RRL_MASK ,
NVME_FEAT_PLM_NVMSETID_SHIFT ,
NVME_FEAT_PLM_NVMSETID_MASK ,
NVME_FEAT_PLM_LPE_SHIFT ,
NVME_FEAT_PLM_LPE_MASK ,
NVME_FEAT_PLMW_WS_SHIFT ,
NVME_FEAT_PLMW_WS_MASK ,
NVME_FEAT_LBAS_LSIRI_SHIFT ,
NVME_FEAT_LBAS_LSIRI_MASK ,
NVME_FEAT_LBAS_LSIPI_SHIFT ,
NVME_FEAT_LBAS_LSIPI_MASK ,
NVME_FEAT_SC_NODRM_SHIFT ,
NVME_FEAT_SC_NODRM_MASK ,
NVME_FEAT_EG_ENDGID_SHIFT ,
NVME_FEAT_EG_ENDGID_MASK ,
NVME_FEAT_EG_EGCW_SHIFT ,
NVME_FEAT_EG_EGCW_MASK ,
NVME_FEAT_FDPE_PHNDL_SHIFT ,
NVME_FEAT_FDPE_PHNDL_MASK ,
NVME_FEAT_FDPE_NOET_SHIFT ,
NVME_FEAT_FDPE_NOET_MASK ,
NVME_FEAT_SPM_PBSLC_SHIFT ,
NVME_FEAT_SPM_PBSLC_MASK ,
NVME_FEAT_HOSTID_EXHID_SHIFT ,
NVME_FEAT_HOSTID_EXHID_MASK ,
NVME_FEAT_RM_REGPRE_SHIFT ,
NVME_FEAT_RM_REGPRE_MASK ,
NVME_FEAT_RM_RESREL_SHIFT ,
NVME_FEAT_RM_RESREL_MASK ,
NVME_FEAT_RM_RESPRE_SHIFT ,
NVME_FEAT_RM_RESPRE_MASK ,
NVME_FEAT_RP_PTPL_SHIFT ,
NVME_FEAT_RP_PTPL_MASK ,
NVME_FEAT_WP_WPS_SHIFT ,
NVME_FEAT_WP_WPS_MASK ,
NVME_FEAT_IOCSP_IOCSCI_SHIFT ,
NVME_FEAT_IOCSP_IOCSCI_MASK ,
NVME_FEAT_SPINUP_CONTROL_SHIFT ,
NVME_FEAT_SPINUP_CONTROL_MASK ,
NVME_FEAT_PLS_MODE_SHIFT ,
NVME_FEAT_PLS_MODE_MASK ,
NVME_FEAT_PERFC_ATTRI_SHIFT ,
NVME_FEAT_PERFC_ATTRI_MASK ,
NVME_FEAT_PERFC_RVSPA_SHIFT ,
NVME_FEAT_PERFC_RVSPA_MASK ,
NVME_FEAT_PERFC_ATTRTYP_SHIFT ,
NVME_FEAT_PERFC_ATTRTYP_MASK ,
NVME_FEAT_FDP_ENABLED_SHIFT ,
NVME_FEAT_FDP_ENABLED_MASK ,
NVME_FEAT_FDP_INDEX_SHIFT ,
NVME_FEAT_FDP_INDEX_MASK ,
NVME_FEAT_FDP_EVENTS_ENABLE_SHIFT ,
NVME_FEAT_FDP_EVENTS_ENABLE_MASK ,
NVME_FEAT_HOST_ID_EXHID_SHIFT ,
NVME_FEAT_HOST_ID_EXHID_MASK ,
NVME_FEAT_BPWPC_BP0WPS_SHIFT ,
NVME_FEAT_BPWPC_BP0WPS_MASK ,
NVME_FEAT_BPWPC_BP1WPS_SHIFT ,
NVME_FEAT_BPWPC_BP1WPS_MASK ,
NVME_FEAT_SANITIZE_NODRM_SHIFT ,
NVME_FEAT_SANITIZE_NODRM_MASK ,
NVME_FEAT_RESP_PTPL_SHIFT ,
NVME_FEAT_RESP_PTPL_MASK ,
NVME_FEAT_CDP_CHPS ,
NVME_FEAT_CDP_PERFS ,
NVME_FEAT_CDP_PERID_SHIFT ,
NVME_FEAT_CDP_PERID_MASK ,
NVME_FEAT_CDP_PMDSS ,
NVME_FEAT_CDP_PPSC ,
NVME_FEAT_POWER_LIMIT_PLV_SHIFT ,
NVME_FEAT_POWER_LIMIT_PLV_MASK ,
NVME_FEAT_POWER_LIMIT_PLS_SHIFT ,
NVME_FEAT_POWER_LIMIT_PLS_MASK ,
NVME_FEAT_POWER_THRESH_PTV_SHIFT ,
NVME_FEAT_POWER_THRESH_PTV_MASK ,
NVME_FEAT_POWER_THRESH_PTS_SHIFT ,
NVME_FEAT_POWER_THRESH_PTS_MASK ,
NVME_FEAT_POWER_THRESH_PMTS_SHIFT ,
NVME_FEAT_POWER_THRESH_PMTS_MASK ,
NVME_FEAT_POWER_THRESH_EPT_SHIFT ,
NVME_FEAT_POWER_THRESH_EPT_MASK ,
NVME_FEAT_POWER_MEAS_ACT_SHIFT ,
NVME_FEAT_POWER_MEAS_ACT_MASK ,
NVME_FEAT_POWER_MEAS_PMTS_SHIFT ,
NVME_FEAT_POWER_MEAS_PMTS_MASK ,
NVME_FEAT_POWER_MEAS_SMT_SHIFT ,
NVME_FEAT_POWER_MEAS_SMT_MASK ,
NVME_FEAT_VOLTAGE_THRESHOLD_UVT_SHIFT ,
NVME_FEAT_VOLTAGE_THRESHOLD_UVT_MASK ,
NVME_FEAT_VOLTAGE_THRESHOLD_OVT_SHIFT ,
NVME_FEAT_VOLTAGE_THRESHOLD_OVT_MASK ,
NVME_FEAT_VOLTAGE_THRESHOLD_EVT ,
NVME_FEAT_VOLTAGE_THRESHOLD_VSENS_SHIFT ,
NVME_FEAT_VOLTAGE_THRESHOLD_VSENS_MASK ,
NVME_FEAT_VOLTAGE_MEASUREMENT_ACT_SHIFT ,
NVME_FEAT_VOLTAGE_MEASUREMENT_ACT_MASK ,
NVME_FEAT_RATE_LIMITING_TID_SHIFT ,
NVME_FEAT_RATE_LIMITING_TID_MASK ,
NVME_FEAT_RATE_LIMITING_TGT_SHIFT ,
NVME_FEAT_RATE_LIMITING_TGT_MASK
};
β οΈ okay quick vibe check, bestie: this enum is literally the whole content of this section. there's no extra prose in the original telling you what each constant is for β it's just the declaration. so if you were waiting for me to spill the tea on what NVME_FEAT_AE_HDLPCN_MASK actually masks... that info lives somewhere else, not here. π i'm not gonna make it up, that would be so not slay of me.
π a lil tour, because it's long and you deserve a map π
not new info, just me pointing at what's already right there in the list β so you don't get lost in the sauce π
- the
_SHIFT/_MASKpairs are the standard move β every one of these comes as a matched set, and the pattern<GROUP>_<FIELD>_SHIFTnext to<GROUP>_<FIELD>_MASKholds all the way down the file π NVME_FEAT_ARBITRATION_*kicks it off withBURST,LPW,MPW,HPWβ four fields, eight constants, first of many π¦NVME_FEAT_PWRMGMT_*,NVME_FEAT_TT_*(TMPTH,TMPSEL,THSEL,TMPTHH),NVME_FEAT_ERROR_RECOVERY_*,NVME_FEAT_NRQS_*,NVME_FEAT_IRQC_*β yes bestie, they really did just keep going π₯- the
NVME_FEAT_AE_*family is the absolute main character of this list βSMART,NAN,FW,TELEM,ANA,PLA,LBAS,EGA,NNSSHDN,TTHRY,RASSN,RGRP0,ANSAN,CCRCN,LHCN,RLCCN,ZDCN,PMDRLPCN,ADLPCN,HDLPCN,DLPCNβ¦ that's twenty-one fields, bestie. twenty-one. and honestly? ate. π NVME_FEAT_CDP_CHPS,NVME_FEAT_CDP_PERFS,NVME_FEAT_CDP_PMDSS,NVME_FEAT_CDP_PPSCandNVME_FEAT_VOLTAGE_THRESHOLD_EVTβ here they are, the no-mask solo artists π they're nestled right in between their paired-up neighbours and they simply do not have a_SHIFT/_MASKtwin. iconic, mysterious, slightly chaotic. we don't question them. π- the power / voltage / rate-limiting crew closes us out β
POWER_LIMIT_*,POWER_THRESH_*,POWER_MEAS_*,VOLTAGE_THRESHOLD_*,VOLTAGE_MEASUREMENT_*,RATE_LIMITING_*β‘πΈ - also don't sleep on the near-duplicates, because they are not typos and you cannot merge them:
NVME_FEAT_HOSTID_EXHID_SHIFT/_MASKandNVME_FEAT_HOST_ID_EXHID_SHIFT/_MASKare two separate things living their two separate lives, same withNVME_FEAT_RP_PTPL_*vsNVME_FEAT_RESP_PTPL_*, andNVME_FEAT_LBAS_*shows up in two different neighbourhoods. copy the exact name you need, every time, no shortcuts π
and that's the whole of part one, bestie β no exit statuses, no error codes, no environment variables hiding in here, it's pure constants πΈ
π there's more coming, so don't go anywhere β this is not the end of the page, and the rest is still loading in. π§
πΈ CONSTANTS πΈ
okay bestie, sit down, hydrate, this is the long one π
it's the full constant dump, in order, nothing skipped β every _SHIFT and every _MASK is here, and the ones that had a little note in the original get their note. everything in backticks is literal, copy it exactly, don't get cute with the spelling β¨
most of these are just a name and a vibe (no description given, the name is doing all the work), and a few come with an actual explanation which I've kept for you π«Ά
NVME_FEAT_ARBITRATION_BURST_SHIFTNVME_FEAT_ARBITRATION_BURST_MASKNVME_FEAT_ARBITRATION_LPW_SHIFTNVME_FEAT_ARBITRATION_LPW_MASKNVME_FEAT_ARBITRATION_MPW_SHIFTNVME_FEAT_ARBITRATION_MPW_MASKNVME_FEAT_ARBITRATION_HPW_SHIFTNVME_FEAT_ARBITRATION_HPW_MASK
arbitration era π four pairs, no notes, zero elaboration, but they're iconic for showing up first.
NVME_FEAT_PWRMGMT_PS_SHIFTNVME_FEAT_PWRMGMT_PS_MASKNVME_FEAT_PWRMGMT_WH_SHIFTNVME_FEAT_PWRMGMT_WH_MASKNVME_FEAT_PWRMGMT_IIELL_SHIFTβ the shift amount to set/get the Idle I/O Exit Latency Limit (IIELL), in units of 100 microseconds β±οΈNVME_FEAT_PWRMGMT_IIELL_MASKβ the mask to set/get IIELL
NVME_FEAT_LBAR_NR_SHIFTNVME_FEAT_LBAR_NR_MASKNVME_FEAT_TT_TMPTH_SHIFTNVME_FEAT_TT_TMPTH_MASKNVME_FEAT_TT_TMPSEL_SHIFTNVME_FEAT_TT_TMPSEL_MASKNVME_FEAT_TT_THSEL_SHIFTNVME_FEAT_TT_THSEL_MASKNVME_FEAT_TT_TMPTHH_SHIFTNVME_FEAT_TT_TMPTHH_MASKNVME_FEAT_ERROR_RECOVERY_TLER_SHIFTNVME_FEAT_ERROR_RECOVERY_TLER_MASKNVME_FEAT_ERROR_RECOVERY_DULBE_SHIFTNVME_FEAT_ERROR_RECOVERY_DULBE_MASKNVME_FEAT_VWC_WCE_SHIFTNVME_FEAT_VWC_WCE_MASKNVME_FEAT_NRQS_NSQR_SHIFTNVME_FEAT_NRQS_NSQR_MASKNVME_FEAT_NRQS_NCQR_SHIFTNVME_FEAT_NRQS_NCQR_MASKNVME_FEAT_IRQC_THR_SHIFTNVME_FEAT_IRQC_THR_MASKNVME_FEAT_IRQC_TIME_SHIFTNVME_FEAT_IRQC_TIME_MASKNVME_FEAT_ICFG_IV_SHIFTNVME_FEAT_ICFG_IV_MASKNVME_FEAT_ICFG_CD_SHIFTNVME_FEAT_ICFG_CD_MASKNVME_FEAT_WA_DN_SHIFTNVME_FEAT_WA_DN_MASK
that's a whole little block of shift + mask besties, no commentary attached in the source, so no invented lore from me π
now the async event notification ones, and honestly this run ate π
NVME_FEAT_AE_SMART_SHIFTNVME_FEAT_AE_SMART_MASKNVME_FEAT_AE_NAN_SHIFTNVME_FEAT_AE_NAN_MASKNVME_FEAT_AE_FW_SHIFTNVME_FEAT_AE_FW_MASKNVME_FEAT_AE_TELEM_SHIFTNVME_FEAT_AE_TELEM_MASKNVME_FEAT_AE_ANA_SHIFTNVME_FEAT_AE_ANA_MASKNVME_FEAT_AE_PLA_SHIFTNVME_FEAT_AE_PLA_MASKNVME_FEAT_AE_LBAS_SHIFTNVME_FEAT_AE_LBAS_MASKNVME_FEAT_AE_EGA_SHIFTNVME_FEAT_AE_EGA_MASKNVME_FEAT_AE_NNSSHDN_SHIFTNVME_FEAT_AE_NNSSHDN_MASKNVME_FEAT_AE_TTHRY_SHIFTNVME_FEAT_AE_TTHRY_MASKNVME_FEAT_AE_RASSN_SHIFTNVME_FEAT_AE_RASSN_MASKNVME_FEAT_AE_RGRP0_SHIFTNVME_FEAT_AE_RGRP0_MASKNVME_FEAT_AE_ANSAN_SHIFTNVME_FEAT_AE_ANSAN_MASKNVME_FEAT_AE_CCRCN_SHIFTNVME_FEAT_AE_CCRCN_MASKNVME_FEAT_AE_LHCN_SHIFTNVME_FEAT_AE_LHCN_MASKNVME_FEAT_AE_RLCCN_SHIFTβ the shift amount to get/set the Rate Limiting Configuration Change Notices (RLCCN)NVME_FEAT_AE_RLCCN_MASKβ the mask to get/set RLCCNNVME_FEAT_AE_ZDCN_SHIFTNVME_FEAT_AE_ZDCN_MASKNVME_FEAT_AE_PMDRLPCN_SHIFTNVME_FEAT_AE_PMDRLPCN_MASKNVME_FEAT_AE_ADLPCN_SHIFTNVME_FEAT_AE_ADLPCN_MASKNVME_FEAT_AE_HDLPCN_SHIFTNVME_FEAT_AE_HDLPCN_MASKNVME_FEAT_AE_DLPCN_SHIFTNVME_FEAT_AE_DLPCN_MASK
NVME_FEAT_APST_APSTE_SHIFTNVME_FEAT_APST_APSTE_MASKNVME_FEAT_HMEM_EHM_SHIFTNVME_FEAT_HMEM_EHM_MASKNVME_FEAT_KATO_TIMEOUT_SHIFTNVME_FEAT_KATO_TIMEOUT_MASKNVME_FEAT_HCTM_TMT2_SHIFTNVME_FEAT_HCTM_TMT2_MASKNVME_FEAT_HCTM_TMT1_SHIFTNVME_FEAT_HCTM_TMT1_MASKNVME_FEAT_NOPS_NOPPME_SHIFTNVME_FEAT_NOPS_NOPPME_MASKNVME_FEAT_RRL_NVMSETID_SHIFTNVME_FEAT_RRL_NVMSETID_MASKNVME_FEAT_RRL_RRL_SHIFTNVME_FEAT_RRL_RRL_MASKNVME_FEAT_PLM_NVMSETID_SHIFTNVME_FEAT_PLM_NVMSETID_MASKNVME_FEAT_PLM_LPE_SHIFTNVME_FEAT_PLM_LPE_MASKNVME_FEAT_PLMW_WS_SHIFTNVME_FEAT_PLMW_WS_MASKNVME_FEAT_LBAS_LSIRI_SHIFTNVME_FEAT_LBAS_LSIRI_MASKNVME_FEAT_LBAS_LSIPI_SHIFTNVME_FEAT_LBAS_LSIPI_MASKNVME_FEAT_SC_NODRM_SHIFTNVME_FEAT_SC_NODRM_MASKNVME_FEAT_EG_ENDGID_SHIFTNVME_FEAT_EG_ENDGID_MASKNVME_FEAT_EG_EGCW_SHIFTNVME_FEAT_EG_EGCW_MASKNVME_FEAT_FDPE_PHNDL_SHIFTNVME_FEAT_FDPE_PHNDL_MASKNVME_FEAT_FDPE_NOET_SHIFTNVME_FEAT_FDPE_NOET_MASKNVME_FEAT_SPM_PBSLC_SHIFTNVME_FEAT_SPM_PBSLC_MASKNVME_FEAT_HOSTID_EXHID_SHIFTNVME_FEAT_HOSTID_EXHID_MASKNVME_FEAT_RM_REGPRE_SHIFTNVME_FEAT_RM_REGPRE_MASKNVME_FEAT_RM_RESREL_SHIFTNVME_FEAT_RM_RESREL_MASKNVME_FEAT_RM_RESPRE_SHIFTNVME_FEAT_RM_RESPRE_MASKNVME_FEAT_RP_PTPL_SHIFTNVME_FEAT_RP_PTPL_MASKNVME_FEAT_WP_WPS_SHIFTNVME_FEAT_WP_WPS_MASKNVME_FEAT_IOCSP_IOCSCI_SHIFTNVME_FEAT_IOCSP_IOCSCI_MASKNVME_FEAT_SPINUP_CONTROL_SHIFTNVME_FEAT_SPINUP_CONTROL_MASKNVME_FEAT_PLS_MODE_SHIFTNVME_FEAT_PLS_MODE_MASKNVME_FEAT_PERFC_ATTRI_SHIFTNVME_FEAT_PERFC_ATTRI_MASKNVME_FEAT_PERFC_RVSPA_SHIFTNVME_FEAT_PERFC_RVSPA_MASKNVME_FEAT_PERFC_ATTRTYP_SHIFTNVME_FEAT_PERFC_ATTRTYP_MASKNVME_FEAT_FDP_ENABLED_SHIFTNVME_FEAT_FDP_ENABLED_MASKNVME_FEAT_FDP_INDEX_SHIFTNVME_FEAT_FDP_INDEX_MASKNVME_FEAT_FDP_EVENTS_ENABLE_SHIFTNVME_FEAT_FDP_EVENTS_ENABLE_MASKNVME_FEAT_HOST_ID_EXHID_SHIFTNVME_FEAT_HOST_ID_EXHID_MASKNVME_FEAT_BPWPC_BP0WPS_SHIFTNVME_FEAT_BPWPC_BP0WPS_MASKNVME_FEAT_BPWPC_BP1WPS_SHIFTNVME_FEAT_BPWPC_BP1WPS_MASKNVME_FEAT_SANITIZE_NODRM_SHIFTNVME_FEAT_SANITIZE_NODRM_MASKNVME_FEAT_RESP_PTPL_SHIFTNVME_FEAT_RESP_PTPL_MASK
heads up bestie:NVME_FEAT_HOSTID_EXHID_SHIFT/_MASKandNVME_FEAT_HOST_ID_EXHID_SHIFT/_MASKare two different spellings that both live in here π don't go "fixing" one into the other, they're both listed in the source and both must stay. copy-paste, never retype, iykyk π
the CDP ones π¦
these are the change-personality constants, and a few of them came with actual notes about which dword they live in β keep those exact:
NVME_FEAT_CDP_CHPSβ Change Personality Settings (Set Features Command Dword 13 only)NVME_FEAT_CDP_PERFSβ Personality Freeze State (Set Features Command Dword 13, and Get Features Completion Queue Entry Dword 0)NVME_FEAT_CDP_PERID_SHIFTβ the shift amount to set/get the Personality Identifier (Set Features Command Dword 13, and Get Features Completion Queue Entry Dword 0)NVME_FEAT_CDP_PERID_MASKβ the mask to set/get the Personality IdentifierNVME_FEAT_CDP_PMDSSβ Personality Manufacturing Default Settings State (Get Features Completion Queue Entry Dword 0 only)NVME_FEAT_CDP_PPSCβ Pending Personality Settings Change (Get Features Completion Queue Entry Dword 0 only)
power stuff π₯
NVME_FEAT_POWER_LIMIT_PLV_SHIFTNVME_FEAT_POWER_LIMIT_PLV_MASKNVME_FEAT_POWER_LIMIT_PLS_SHIFTNVME_FEAT_POWER_LIMIT_PLS_MASKNVME_FEAT_POWER_THRESH_PTV_SHIFTNVME_FEAT_POWER_THRESH_PTV_MASKNVME_FEAT_POWER_THRESH_PTS_SHIFTNVME_FEAT_POWER_THRESH_PTS_MASKNVME_FEAT_POWER_THRESH_PMTS_SHIFTNVME_FEAT_POWER_THRESH_PMTS_MASKNVME_FEAT_POWER_THRESH_EPT_SHIFTNVME_FEAT_POWER_THRESH_EPT_MASKNVME_FEAT_POWER_MEAS_ACT_SHIFTNVME_FEAT_POWER_MEAS_ACT_MASKNVME_FEAT_POWER_MEAS_PMTS_SHIFTNVME_FEAT_POWER_MEAS_PMTS_MASKNVME_FEAT_POWER_MEAS_SMT_SHIFTNVME_FEAT_POWER_MEAS_SMT_MASK
voltage + rate limiting β‘
these ones do have notes, and the notes reference enums, so keep the enum names exactly as written bestie:
NVME_FEAT_VOLTAGE_THRESHOLD_UVT_SHIFTβ the shift amount to set/get the Undervoltage Threshold (UVT)NVME_FEAT_VOLTAGE_THRESHOLD_UVT_MASKβ the mask to set/get UVTNVME_FEAT_VOLTAGE_THRESHOLD_OVT_SHIFTβ the shift amount to set/get the Overvoltage Threshold (OVT)NVME_FEAT_VOLTAGE_THRESHOLD_OVT_MASKβ the mask to set/get OVTNVME_FEAT_VOLTAGE_THRESHOLD_EVTβ Enable Voltage ThresholdNVME_FEAT_VOLTAGE_THRESHOLD_VSENS_SHIFTβ the shift amount to set/get the Voltage Sensor Select (VSENS), seeenum nvme_voltage_sensorNVME_FEAT_VOLTAGE_THRESHOLD_VSENS_MASKβ the mask to set/get VSENSNVME_FEAT_VOLTAGE_MEASUREMENT_ACT_SHIFTβ the shift amount to set the Action (ACT), seeenum nvme_voltage_measurement_actNVME_FEAT_VOLTAGE_MEASUREMENT_ACT_MASKβ the mask to set ACTNVME_FEAT_RATE_LIMITING_TID_SHIFTβ the shift amount to set/get the Target Identifier (TID)NVME_FEAT_RATE_LIMITING_TID_MASKβ the mask to set/get TIDNVME_FEAT_RATE_LIMITING_TGT_SHIFTβ the shift amount to set/get the Target (TGT), seeenum nvme_rate_limiting_targetNVME_FEAT_RATE_LIMITING_TGT_MASKβ the mask to set/get TGT
and that's the whole list, bestie β every single constant, in order, accounted for π that's the entire Constants section of enum nvme_feat, no cap, nothing dropped on the floor. you ate that π
β¨
this was the enum nvme_feat page from libnvme, dated October 2026 β mwah, go touch some grass, then come back and read part one again π«Άπ
π¦ where this page comes from
- arch rolling: nvme-cli 3.2-1 Β· GPL-2.0-or-later
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms