libnvme(2)

💖 NAME 💖

okay bestie, buckle up — this is all about enum nvme_cap, aka the controller capabilities register. it's the enum that tells you which bits of the CAP register hold which secrets, and what the magic values inside those bits actually mean. it's giving ✨decoder ring✨ but for NVMe. this page lives in section 2 of the libnvme API manual 🎀

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🌸 SYNOPSIS 🌸

enum nvme_cap {
    NVME_CAP_MQES_SHIFT ,
    NVME_CAP_CQR_SHIFT ,
    NVME_CAP_AMS_SHIFT ,
    NVME_CAP_TO_SHIFT ,
    NVME_CAP_DSTRD_SHIFT ,
    NVME_CAP_NSSRC_SHIFT ,
    NVME_CAP_CSS_SHIFT ,
    NVME_CAP_BPS_SHIFT ,
    NVME_CAP_CPS_SHIFT ,
    NVME_CAP_MPSMIN_SHIFT ,
    NVME_CAP_MPSMAX_SHIFT ,
    NVME_CAP_PMRS_SHIFT ,
    NVME_CAP_CMBS_SHIFT ,
    NVME_CAP_NSSS_SHIFT ,
    NVME_CAP_CRMS_SHIFT ,
    NVME_CAP_MQES_MASK ,
    NVME_CAP_CQR_MASK ,
    NVME_CAP_AMS_MASK ,
    NVME_CAP_TO_MASK ,
    NVME_CAP_DSTRD_MASK ,
    NVME_CAP_NSSRC_MASK ,
    NVME_CAP_CSS_MASK ,
    NVME_CAP_BPS_MASK ,
    NVME_CAP_CPS_MASK ,
    NVME_CAP_MPSMIN_MASK ,
    NVME_CAP_MPSMAX_MASK ,
    NVME_CAP_PMRS_MASK ,
    NVME_CAP_CMBS_MASK ,
    NVME_CAP_NSSS_MASK ,
    NVME_CAP_CRMS_MASK ,
    NVME_CAP_AMS_WRR ,
    NVME_CAP_AMS_VS ,
    NVME_CAP_CSS_NVM ,
    NVME_CAP_CSS_CSI ,
    NVME_CAP_CSS_ADMIN ,
    NVME_CAP_CPS_NONE ,
    NVME_CAP_CPS_CTRL ,
    NVME_CAP_CPS_DOMAIN ,
    NVME_CAP_CPS_NVMS ,
    NVME_CAP_CRWMS ,
    NVME_CAP_CRIMS

};

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✨ Constants ✨

so like, these come in three flavors: shifts (how far to slide over to find your field), masks (what's left once you've slid), and actual values (what the field is tryna tell you). every single one is below, no skips, no cuts 💅

🌀 Shift amounts

• NVME_CAP_MQES_SHIFT — the shift amount that gets you the maximum queue entries supported
• NVME_CAP_CQR_SHIFT — the shift amount that gets you the contiguous queues required
• NVME_CAP_AMS_SHIFT — the shift amount that gets you the arbitration mechanism supported
• NVME_CAP_TO_SHIFT — the shift amount that gets you the timeout
• NVME_CAP_DSTRD_SHIFT — the shift amount that gets you the doorbell stride
• NVME_CAP_NSSRC_SHIFT — the shift amount that gets you the NVM subsystem reset supported
• NVME_CAP_CSS_SHIFT — the shift amount that gets you the command sets supported
• NVME_CAP_BPS_SHIFT — the shift amount that gets you the boot partition support
• NVME_CAP_CPS_SHIFT — the shift amount that gets you the controller power scope
• NVME_CAP_MPSMIN_SHIFT — the shift amount that gets you the memory page size minimum
• NVME_CAP_MPSMAX_SHIFT — the shift amount that gets you the memory page size maximum
• NVME_CAP_PMRS_SHIFT — the shift amount that gets you the persistent memory region supported
• NVME_CAP_CMBS_SHIFT — the shift amount that gets you the controller memory buffer supported
• NVME_CAP_NSSS_SHIFT — the shift amount that gets you the NVM subsystem shutdown supported
• NVME_CAP_CRMS_SHIFT — the shift amount that gets you the controller ready modes supported

🎀 Masks

• NVME_CAP_MQES_MASK — the mask that gets you the maximum queue entries supported
• NVME_CAP_CQR_MASK — the mask that gets you the contiguous queues required
• NVME_CAP_AMS_MASK — the mask that gets you the arbitration mechanism supported
• NVME_CAP_TO_MASK — the mask that gets you the timeout
• NVME_CAP_DSTRD_MASK — the mask that gets you the doorbell stride
• NVME_CAP_NSSRC_MASK — the mask that gets you the NVM subsystem reset supported
• NVME_CAP_CSS_MASK — the mask that gets you the command sets supported
• NVME_CAP_BPS_MASK — the mask that gets you the boot partition support
• NVME_CAP_CPS_MASK — the mask that gets you the controller power scope
• NVME_CAP_MPSMIN_MASK — the mask that gets you the memory page size minimum
• NVME_CAP_MPSMAX_MASK — the mask that gets you the memory page size maximum
• NVME_CAP_PMRS_MASK — the mask that gets you the persistent memory region supported
• NVME_CAP_CMBS_MASK — the mask that gets you the controller memory buffer supported
• NVME_CAP_NSSS_MASK — the mask that gets you the NVM subsystem shutdown supported
• NVME_CAP_CRMS_MASK — the mask that gets you the controller ready modes supported

💎 Actual values

• NVME_CAP_AMS_WRR — weighted round robin with urgent priority class 👑
• NVME_CAP_AMS_VS — vendor specific (iykyk, it's theirs, not ours 🙈)
• NVME_CAP_CSS_NVM — NVM command set or a discovery controller
• NVME_CAP_CSS_CSI — the controller supports one or more I/O command sets
• NVME_CAP_CSS_ADMIN — no I/O command set is supported
• NVME_CAP_CPS_NONE — not reported, the mystery era 💀
• NVME_CAP_CPS_CTRL — controller scope
• NVME_CAP_CPS_DOMAIN — domain scope
• NVME_CAP_CPS_NVMS — NVM subsystem scope
• NVME_CAP_CRWMS — controller ready with media support
• NVME_CAP_CRIMS — controller ready independent of media support

fr fr bestie, nothing here is optional homework — shifts get you the field, masks carve it out, values tell you what it says. no cap. 🫶

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that's the whole page, bestie — no crumbs left, we ate 🍓 source/version is the libnvme API manual, page enum nvme_cap from section 2, and it's stamped July 2026. periodt. 💅✨