libnvme(9)

πŸ“¦ version 3.2, in arch rolling

πŸ¦‹ NAME πŸ¦‹

okay so welcome to the libnvme(9) API Manual, bestie πŸ’– β€” this page is literally all about enum nvme_cap, and this field indicates the controller capabilities register. That's the vibe: controller capabilities decoded into shift amounts, masks, and a few iconic named values ✨.


✨ SYNOPSIS ✨

here's the enum in all its glory β€” every constant exactly where it belongs, no cap πŸ‘‘

enum nvme_cap {
    NVME_CAP_MQES_SHIFT ,
    NVME_CAP_CQR_SHIFT ,
    NVME_CAP_AMS_SHIFT ,
    NVME_CAP_TO_SHIFT ,
    NVME_CAP_DSTRD_SHIFT ,
    NVME_CAP_NSSRS_SHIFT ,
    NVME_CAP_CSS_SHIFT ,
    NVME_CAP_BPS_SHIFT ,
    NVME_CAP_CPS_SHIFT ,
    NVME_CAP_MPSMIN_SHIFT ,
    NVME_CAP_MPSMAX_SHIFT ,
    NVME_CAP_PMRS_SHIFT ,
    NVME_CAP_CMBS_SHIFT ,
    NVME_CAP_NSSS_SHIFT ,
    NVME_CAP_CRMS_SHIFT ,
    NVME_CAP_NSSES_SHIFT ,
    NVME_CAP_MQES_MASK ,
    NVME_CAP_CQR_MASK ,
    NVME_CAP_AMS_MASK ,
    NVME_CAP_TO_MASK ,
    NVME_CAP_DSTRD_MASK ,
    NVME_CAP_NSSRS_MASK ,
    NVME_CAP_CSS_MASK ,
    NVME_CAP_BPS_MASK ,
    NVME_CAP_CPS_MASK ,
    NVME_CAP_MPSMIN_MASK ,
    NVME_CAP_MPSMAX_MASK ,
    NVME_CAP_PMRS_MASK ,
    NVME_CAP_CMBS_MASK ,
    NVME_CAP_NSSS_MASK ,
    NVME_CAP_CRMS_MASK ,
    NVME_CAP_NSSES_MASK ,
    NVME_CAP_AMS_WRR ,
    NVME_CAP_AMS_VS ,
    NVME_CAP_CSS_NVM ,
    NVME_CAP_CSS_CSI ,
    NVME_CAP_CSS_ADMIN ,
    NVME_CAP_CPS_NONE ,
    NVME_CAP_CPS_CTRL ,
    NVME_CAP_CPS_DOMAIN ,
    NVME_CAP_CPS_NVMS ,
    NVME_CAP_CRWMS ,
    NVME_CAP_CRIMS

};

🌈 Constants 🌈

okay bestie, here's the full lineup β€” no skips, no shortcuts, we're getting every single one πŸ’…

  • NVME_CAP_MQES_SHIFT β€” shift amount to get the maximum queue entries supported πŸŽ€
  • NVME_CAP_CQR_SHIFT β€” shift amount to get the contiguous queues required
  • NVME_CAP_AMS_SHIFT β€” shift amount to get the arbitration mechanism supported
  • NVME_CAP_TO_SHIFT β€” shift amount to get the timeout
  • NVME_CAP_DSTRD_SHIFT β€” shift amount to get the doorbell stride
  • NVME_CAP_NSSRS_SHIFT β€” shift amount to get the NVM subsystem reset supported
  • NVME_CAP_CSS_SHIFT β€” shift amount to get the command sets supported
  • NVME_CAP_BPS_SHIFT β€” shift amount to get the boot partition support
  • NVME_CAP_CPS_SHIFT β€” shift amount to get the controller power scope
  • NVME_CAP_MPSMIN_SHIFT β€” shift amount to get the memory page size minimum
  • NVME_CAP_MPSMAX_SHIFT β€” shift amount to get the memory page size maximum
  • NVME_CAP_PMRS_SHIFT β€” shift amount to get the persistent memory region supported
  • NVME_CAP_CMBS_SHIFT β€” shift amount to get the controller memory buffer supported
  • NVME_CAP_NSSS_SHIFT β€” shift amount to get the NVM subsystem shutdown supported
  • NVME_CAP_CRMS_SHIFT β€” shift amount to get the controller ready modes supported
  • NVME_CAP_NSSES_SHIFT β€” shift amount to get the NVM subsystem shutdown enhancements supported ✨
  • NVME_CAP_MQES_MASK β€” mask to get the maximum queue entries supported
  • NVME_CAP_CQR_MASK β€” mask to get the contiguous queues required
  • NVME_CAP_AMS_MASK β€” mask to get the arbitration mechanism supported
  • NVME_CAP_TO_MASK β€” mask to get the timeout
  • NVME_CAP_DSTRD_MASK β€” mask to get the doorbell stride
  • NVME_CAP_NSSRS_MASK β€” mask to get the NVM subsystem reset supported
  • NVME_CAP_CSS_MASK β€” mask to get the command sets supported
  • NVME_CAP_BPS_MASK β€” mask to get the boot partition support
  • NVME_CAP_CPS_MASK β€” mask to get the controller power scope
  • NVME_CAP_MPSMIN_MASK β€” mask to get the memory page size minimum
  • NVME_CAP_MPSMAX_MASK β€” mask to get the memory page size maximum
  • NVME_CAP_PMRS_MASK β€” mask to get the persistent memory region supported
  • NVME_CAP_CMBS_MASK β€” mask to get the controller memory buffer supported
  • NVME_CAP_NSSS_MASK β€” mask to get the NVM subsystem shutdown supported
  • NVME_CAP_CRMS_MASK β€” mask to get the controller ready modes supported
  • NVME_CAP_NSSES_MASK β€” mask to get the NVM subsystem shutdown enhancements supported
  • NVME_CAP_AMS_WRR β€” weighted round robin with urgent priority class πŸ”₯
  • NVME_CAP_AMS_VS β€” vendor specific
  • NVME_CAP_CSS_NVM β€” NVM command set or a discovery controller
  • NVME_CAP_CSS_CSI β€” controller supports one or more I/O command sets
  • NVME_CAP_CSS_ADMIN β€” no I/O command set is supported
  • NVME_CAP_CPS_NONE β€” not reported
  • NVME_CAP_CPS_CTRL β€” controller scope
  • NVME_CAP_CPS_DOMAIN β€” domain scope
  • NVME_CAP_CPS_NVMS β€” NVM subsystem scope
  • NVME_CAP_CRWMS β€” controller ready with media support
  • NVME_CAP_CRIMS β€” controller ready independent of media support πŸ’œ

mwah πŸ’‹ β€” signed, sealed, and slayed by libnvme(9), October 2026, all about enum nvme_cap 🫢

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