MODULARIZE(1)
π NAME π
modularize β manual page for modularize 22. Like, that's the whole name section, bestie. π
β¨ DESCRIPTION β¨
OVERVIEW: modularize.
okay so, OVERVIEW: modularize. That's literally it. That's the overview. Periodt. π
USAGE: modularize [options] <list of one or more header list files> <arguments to be passed to front end>...
modularize [options] <list of one or more header list files> <arguments to be passed to front end>...
So you slap your options on first, then one or more header list files (a list of lists? iconic), then all the args that get passed straight to the front end. FR FR. π¦
OPTIONS:
Color Options:
--colorβ Use colors in output (default=autodetect). Bestie, this makes everything pretty. π
General options:
-I <path>β Include path for coverage check. π--aarch64-neon-syntax=<value>β Choose style of NEON code to emit from AArch64 backend:=genericβ Emit generic NEON assembly=appleβ Emit Apple-style NEON assembly
--aarch64-use-aaβ Enable the use of AA during codegen.--abort-on-max-devirt-iterations-reachedβ Abort when the max iterations for devirtualization CGSCC repeat pass is reached. π€--allow-ginsert-as-artifactβ Allow G_INSERT to be considered an artifact. Hack around AMDGPU test infinite loops.--amdgpu-atomic-optimizer-strategy=<value>β Select DPP or Iterative strategy for scan:=DPPβ Use DPP operations for scan=Iterativeβ Use Iterative approach for scan=Noneβ Disable atomic optimizer
--amdgpu-bypass-slow-divβ Skip 64-bit divide for dynamic 32-bit values.--amdgpu-disable-loop-alignmentβ Do not align and prefetch loops.--amdgpu-dpp-combineβ Enable DPP combiner.--amdgpu-dump-hsa-metadataβ Dump AMDGPU HSA Metadata.--amdgpu-enable-merge-m0β Merge and hoist M0 initializations.--amdgpu-indirect-call-specialization-threshold=<uint>β A threshold controls whether an indirect call will be specialized.--amdgpu-kernarg-preloadβ Enable preload kernel arguments to SGPRs.--amdgpu-kernarg-preload-count=<uint>β How many kernel arguments to preload onto SGPRs.--amdgpu-module-splitting-max-depth=<uint>β maximum search depth. 0 forces a greedy approach. warning: the algorithm is up to O(2^N), where N is the max depth. β οΈ--amdgpu-promote-alloca-to-vector-limit=<uint>β Maximum byte size to consider promote alloca to vector.--amdgpu-promote-alloca-to-vector-max-regs=<uint>β Maximum vector size (in 32b registers) to use when promoting alloca.--amdgpu-promote-alloca-to-vector-vgpr-ratio=<uint>β Ratio of VGPRs to budget for promoting alloca to vectors.--amdgpu-sdwa-peepholeβ Enable SDWA peepholer.--amdgpu-use-aa-in-codegenβ Enable the use of AA during codegen.--amdgpu-verify-hsa-metadataβ Verify AMDGPU HSA Metadata.--amdgpu-vgpr-index-modeβ Use GPR indexing mode instead of movrel for vector indexing.--arc-contract-use-objc-claim-rvβ Enable generation of calls to objc_claimAutoreleasedReturnValue.--argext-abi-checkβ Verify that narrow int args are properly extended per the SystemZ ABI.--arm-add-build-attributesβ (no description in the original)--arm-implicit-it=<value>β Allow conditional instructions outside of an IT block:=alwaysβ Accept in both ISAs, emit implicit ITs in Thumb=neverβ Warn in ARM, reject in Thumb=armβ Accept in ARM, reject in Thumb=thumbβ Warn in ARM, emit implicit ITs in Thumb
--asm-show-instβ Emit internal instruction representation to assembly file.--atomic-counter-update-promotedβ Do counter update using atomic fetch add for promoted counters only.--atomic-first-counterβ Use atomic fetch add for first counter in a function (usually the entry counter).--basic-block-section-match-inferβ Enable matching and inference when generating basic block sections.--block-check-header-list-onlyβ Only warn if#includedirectives are inside extern or namespace blocks if the included header is in the header list.--bounds-checking-single-trapβ Use one trap block per function.--bpf-stack-size=<int>β Specify the BPF stack size limit.--cfg-hide-cold-paths=<number>β Hide blocks with relative frequency below the given value.--cfg-hide-deoptimize-pathsβ (no description in the original)--cfg-hide-unreachable-pathsβ (no description in the original)--check-functions-filter=<regex>β Only emit checks for arguments of functions whose names match the given regular expression.--conditional-counter-updateβ Do conditional counter updates in single byte counters mode)--cost-kind=<value>β Target cost kind:=throughputβ Reciprocal throughput=latencyβ Instruction latency=code-sizeβ Code size=size-latencyβ Code size and latency=allβ Print all cost kinds
--coverage-check-onlyβ Only do the coverage check.--crelβ Use CREL relocation format for ELF.--cs-profile-generateβ Perform context sensitive PGO instrumentation.--cs-profile-path=<string>β Context sensitive profile file path.--ctx-prof-include-emptyβ Also write profiles with all-zero counters. Intended for testing/debugging.--ctx-profile-force-is-specializedβ Treat the given module as-if it were containing the post-thinlink module containing the root.--debugify-atomsβ (no description in the original)--debugify-func-limit=<ulong>β Set max number of processed functions per pass.--debugify-level=<value>β Kind of debug info to add:=locationsβ Locations only=location+variablesβ Locations and Variables
--debugify-quietβ Suppress verbose debugify output.--devirtualize-speculativelyβ Enable speculative devirtualization optimization.--disable-auto-upgrade-debug-infoβ Disable autoupgrade of debug info.--disable-i2p-p2i-optβ Disables inttoptr/ptrtoint roundtrip optimization.--disable-promote-alloca-to-ldsβ Disable promote alloca to LDS.--disable-promote-alloca-to-vectorβ Disable promote alloca to vector.--disable-qfp-optβ Disable optimization of Qfloat operations.--disable-qfp-opt-mulβ Disable optimization of Qfloat operations for multiply.--display-file-listsβ Display lists of good files (no compile errors), problem files, and a combined list with problem files preceded by a '#'.--do-counter-promotionβ Do counter register promotion.--dot-cfg-mssa=<file name for generated dot file>β file name for generated dot file.--dwarf-version=<int>β Dwarf version.--dwarf64β Generate debugging info in the 64-bit DWARF format.--elide-all-zero-branch-weightsβ (no description in the original)--emit-bb-hashβ Emit the hash of basic block in the SHT_LLVM_BB_ADDR_MAP section.--emit-compact-unwind-non-canonicalβ Whether to try to emit Compact Unwind for non canonical entries.--emit-dwarf-unwind=<value>β Whether to emit DWARF EH frame entries:=alwaysβ Always emit EH frame entries=no-compact-unwindβ Only emit EH frame entries when compact unwind is not available=defaultβ Use target platform default
--emit-gnuas-syntax-on-zosβ Emit GNU Assembly Syntax on z/OS.--emscripten-cxx-exceptions-allowed=<string>β The list of function names in which Emscripten-style exception handling is enabled (see emscripten EMSCRIPTEN_CATCHING_ALLOWED options).--enable-cse-in-irtranslatorβ Should enable CSE in irtranslator.--enable-cse-in-legalizerβ Should enable CSE in Legalizer.--enable-devirtualize-speculativelyβ Enable speculative devirtualization optimization.--enable-emscripten-cxx-exceptionsβ WebAssembly Emscripten-style exception handling.--enable-emscripten-sjljβ WebAssembly Emscripten-stylesetjmp/longjmphandling--enable-gvn-hoistβ turn on the GVN hoisting pass (default = off)--enable-gvn-memdepβ no description on this one bestie, it's just vibing in the list--enable-gvn-memoryssaβ also out here with zero blurb--enable-gvn-sinkβ turn on the GVN sinking pass (default = off)--enable-jump-table-to-switchβ turn on the JumpTableToSwitch pass (default = off)--enable-load-in-loop-preβ mystery entry, no description provided--enable-load-preβ same deal, no description π--enable-loop-simplifycfg-term-foldingβ no description given--enable-name-compressionβ turn on name/filename string compression--enable-poison-reuse-guardβ turn on the poison-reuse guard--enable-split-backedge-in-load-preβ no description, we move--enable-split-loopiv-heuristicβ turn on the loop iv regalloc heuristic--enable-vtable-profile-useβ if ThinLTO and WPD are enabled and this option is true, vtable profiles will be used by the ICP pass for a more efficient indirect call sequence. If false, type profiles won't be used.--enable-vtable-value-profilingβ if true, the virtual table address will be instrumented to know the types of a C++ pointer. That info gets used in indirect call promotion to do selective vtable-based comparison.--execute-concurrency=<uint>β the number of threads used to process all files in parallel. Set it to0for hardware concurrency. Heads up: this flag only applies to all-TUs.--executor=<string>β the name of the executor to use.--expand-variadics-override=<value>β override the behaviour of expand-variadics=unspecifiedβ use the implementation defaults=disableβ disable the pass entirely=optimizeβ optimise without changing ABI=loweringβ change variadic calling convention
--experimental-debug-variable-locationsβ use experimental new value-tracking variable locations--fatal-warningsβ treat warnings as errors π--fdpicβ use the FDPIC ABI--filter=<string>β only process files that match this filter. This flag only applies to all-TUs.--force-tail-folding-style=<value>β force the tail folding style=noneβ disable tail folding=dataβ create lane mask for data only, usingactive.lane.maskintrinsic=data-without-lane-maskβ create lane mask withcompare/stepvector=data-and-controlβ create lane mask usingactive.lane.maskintrinsic, and use it for both data and control flow=data-and-control-without-rt-checkβ similar todata-and-control, but remove the runtime check=data-with-evlβ use predicated EVL instructions for tail folding. If EVL is unsupported, fallback todata-without-lane-mask.
--fs-profile-debug-bw-threshold=<uint>β only show debug message if the source branch weight is greater than this value.--fs-profile-debug-prob-diff-threshold=<uint>β only show debug message if the branch probability is greater than this value (in percentage).--generate-merged-base-profilesβ when generating nested context-sensitive profiles, always generate an extra base profile for a function with all its context profiles merged into it.--gpsize=<uint>β Global Pointer Addressing Size. The default size is8.--gsframeβ whether to emit.sframeunwind sections.--hash-based-counter-splitβ rename counter variable of a comdat function based on cfg hash--hexagon-add-build-attributesβ no description, she's mysterious β¨--hexagon-rdf-limit=<uint>β also no description, we simply do not know--hot-cold-splitβ turn on the hot-cold splitting pass--hwasan-percentile-cutoff-hot=<int>β Hot percentile cutoff.--hwasan-random-rate=<number>β probability value in the range[0.0, 1.0]to keep instrumentation of a function. Note: instrumentation can be skipped randomly OR because of the hot percentile cutoff, if both are supplied.--implicit-mapsymsβ allow mapping symbol at section beginning to be implicit, lowering the number of mapping symbols at the expense of some portability. Recommended for projects that can build all their object files using this option--import-all-indexβ import all external functions in index.--incremental-linker-compatibleβ when used withfiletype=obj, emit an object file which can be used with an incremental linker--instcombine-code-sinkingβ turn on code sinking--instcombine-guard-widening-window=<uint>β how wide an instruction window to bypass looking for another guard--instcombine-max-num-phis=<uint>β maximum number phis to handle in intptr/ptrint folding--instcombine-max-sink-users=<uint>β maximum number of undroppable users for instruction sinking--instcombine-maxarray-size=<uint>β maximum array size considered when doing a combine--instcombine-negator-enabledβ should we attempt to sink negations?--instcombine-negator-max-depth=<uint>β what is the maximal lookup depth when trying to check for viability of negation sinking.--instrprof-atomic-counter-update-allβ make all profile counter updates atomic (for testing only)--internalize-public-api-file=<filename>β a file containing list of symbol names to preserve--internalize-public-api-list=<list>β a list of symbol names to preserve--intrinsic-cost-strategy=<value>β costing strategy for intrinsic instructions=instruction-costβ useTargetTransformInfo::getInstructionCost=intrinsic-costβ useTargetTransformInfo::getIntrinsicInstrCost=type-based-intrinsic-costβ calculate the intrinsic cost based only on argument types
--iterative-counter-promotionβ allow counter promotion across the whole loop nest.--loongarch-use-aaβ turn on the use of AA during codegen.--lower-allow-check-percentile-cutoff-hot=<int>β Hot percentile cutoff.--lower-allow-check-random-rate=<number>β probability value in the range[0.0, 1.0]of unconditional pseudo-random checks.--lto-aix-system-assembler=<path>β path to a system assembler, picked up on AIX only--lto-embed-bitcode=<value>β embed LLVM bitcode in object files produced by LTO=noneβ do not embed=optimizedβ embed after all optimization passes=post-merge-pre-optβ embed post merge, but before optimizations
--lto-pass-remarks-filter=<regex>β only record optimization remarks from passes whose names match the given regular expression--lto-pass-remarks-format=<format>β the format used for serializing remarks (default: YAML)--lto-pass-remarks-output=<filename>β output filename for pass remarks--matrix-default-layout=<value>β sets the default matrix layout=column-majorβ use column-major layout=row-majorβ use row-major layout
--matrix-print-after-transpose-optβ no description, just here existing πΈ--max-counter-promotions=<int>β max number of allowed counter promotions--max-counter-promotions-per-loop=<uint>β max number counter promotions per loop, so you don't increase register pressure too much--mc-relax-allβ when used withfiletype=obj, relax all fixups in the emitted object file--mcabacβtbdπ--merror-missing-parenthesisβ error for missing parenthesis around predicate registers--merror-noncontigious-registerβ error for register names that aren't contigious--mhvxβ turn on Hexagon Vector eXtensions--mhvx=<value>β turn on Hexagon Vector eXtensions=v60β build for HVX v60=v62β build for HVX v62=v65β build for HVX v65=v66β build for HVX v66=v67β build for HVX v67=v68β build for HVX v68=v69β build for HVX v69=v71β build for HVX v71=v73β build for HVX v73
=v75β Build for HVX v75 β¨=v79β Build for HVX v79 β¨=v81β Build for HVX v81 β¨
--mips-compact-branches=<value>β MIPS specific: the compact branch policy, bestie. Pick one of these:=neverβ Do not use compact branches if possible.=optimalβ Use compact branches where appropriate β this one's the default, it's giving sensible π=alwaysβ Always use compact branches if possible.
--mips16-constant-islandsβ Enable mips16 constant islands ποΈ--mips16-hard-floatβ Enable mips16 hard float.--mir-strip-debugify-onlyβ Shouldmir-strip-debugonly strip debug info from debugified modules by default? π«£--misexpect-tolerance=<uint>β Prevents emitting diagnostics when profile counts are within N% of the threshold.. (yes, two dots, that's literally how it's written, no cap)--mno-compoundβ Disable looking for compound instructions for Hexagon.--mno-fixupβ Disable fixing up resolved relocations for Hexagon.--mno-ldc1-sdc1β Expand double precision loads and stores to their single precision counterparts.--mno-pairingβ Disable looking for duplex instructions for Hexagon.--module-map-path=<string>β Turn on module map output and specify the output path or file name. If no path is specified, and if theprefixoption is specified, then it uses the prefix for the file path π--ms-secure-hotpatch-functions-file=<filename>β A file containing a list of mangled function names to mark for Windows Secure Hot-Patching π©Ή--ms-secure-hotpatch-functions-list=<list>β A list of mangled function names to mark for Windows Secure Hot-Patching π©Ή--mwarn-missing-parenthesisβ Warn for a missing parenthesis around predicate registers.--mwarn-noncontigious-registerβ Warn for register names that aren't contigious (we're keeping their spelling, don't come for me)--mwarn-sign-mismatchβ Warn for mismatching a signed and unsigned value.--no-coverage-checkβ Don't do the coverage check. π«--no-deprecated-warnβ Suppress all deprecated warnings.--no-discriminatorsβ Disable generation of discriminator information.--no-type-checkβ Suppress type errors (Wasm).--no-warnβ Suppress all warnings π€«--nvptx-approx-log2f32β NVPTX specific: whether to uselg2.approxforlog2.--nvptx-sched4regβ NVPTX specific: schedule for register pressue (their typo, keeping it, it's iconic at this point)--object-size-offset-visitor-max-visit-instructions=<uint>β Maximum number of instructions forObjectSizeOffsetVisitorto look at.--pgo-block-coverageβ Use this option to enable basic block coverage instrumentation π--pgo-temporal-instrumentationβ Use this option to enable temporal instrumentation β±οΈ--pgo-view-block-coverage-graphβ Create a dot file of CFGs with block coverage inference information πΈοΈ--prefix=<string>β Prepend header file paths with this prefix. If it's not specified, the files are considered to be relative to the header list file.--print-pipeline-passesβ Print a'-passes'compatible string describing the pipeline (best-effort only, so don't come at it if it's not perfect π).--problem-files-list=<string>β List of files with compilation or modularization problems for assistant mode. This will be excluded.--profcheck-annotate-selectβ Also inject (if missing) and verifyMD_profforselectinstructions.--profcheck-default-function-entry-count=<long>β (no description given in the original, just vibes and a<long>)--profcheck-default-select-false-weight=<uint>β When annotatingselectinstructions, this value will be used for the second ('false') case.--profcheck-default-select-true-weight=<uint>β When annotatingselectinstructions, this value will be used for the first ('true') case.--profcheck-weights-for-testβ Generate weights with small values for tests π§ͺ--profile-correlate=<value>β Use debug info or a binary file to correlate profiles. Options are:=<empty>β No profile correlation.=debug-infoβ Use debug info to correlate.=binaryβ Use binary to correlate.
--promote-alloca-vector-loop-user-weight=<uint>β The bonus weight of users of allocas within a loop when sorting profitable allocas.--propeller-infer-threshold=<number>β Threshold for inferring a stale profile.--r600-ir-structurizeβ Use theStructurizeCFGIR pass ποΈ--riscv-add-build-attributesβ (no description in the original β it's just out here existing, main character energy with zero explanation β¨)--riscv-use-aaβ Enable the use of AA during codegen.--root-module=<string>β Specify the name of the root module π±--runtime-counter-relocationβ Enable relocating counters at runtime.--safepoint-ir-verifier-print-onlyβ (also no description, bestie. It just is. π)--sample-profile-check-record-coverage=<N>β Emit a warning if less than N% of records in the input profile are matched to the IR.--sample-profile-check-sample-coverage=<N>β Emit a warning if less than N% of samples in the input profile are matched to the IR.--sample-profile-max-propagate-iterations=<uint>β Maximum number of iterations to go through when propagating sample block/edge weights through the CFG.--sampled-instr-burst-duration=<uint>β Set the profile instrumentation burst duration, which can range from1to the value of'sampled-instr-period'(0is invalid π ). This number of samples will be recorded for each'sampled-instr-period'count update. Setting it to1enables simple sampling, in which case it is recommended to set'sampled-instr-period'to a prime number.--sampled-instr-period=<uint>β Set the profile instrumentation sample period. A sample period of0is invalid. For each sample period, a fixed number of consecutive samples will be recorded. That number is controlled by the'sampled-instr-burst-duration'flag. The default sample period of65536is optimized for generating efficient code that leverages unsigned short integer wrapping in overflow, but this is disabled under simple sampling (burst duration =1).--sampled-instrumentationβ Do PGO instrumentation sampling.--sanitizer-early-opt-epβ Insert sanitizers onOptimizerEarlyEP.--save-temp-labelsβ Don't discard temporary labels.--skip-ret-exit-blockβ Suppress counter promotion if exit blocks containret.--speculative-counter-promotion-max-exiting=<uint>β The max number of exiting blocks of a loop to allow speculative counter promotion.--speculative-counter-promotion-to-loopβ When the option is false, if the target block is in a loop, the promotion will be disallowed unless the promoted counter update can be further/iteratively promoted into an acyclic region.--spirv-emit-op-namesβ EmitOpNamefor all instructions.--spirv-ext=<value>β Specify the list of enabled SPIR-V extensions.--spv-allow-unknown-intrinsics[=<intrinsic_prefix_0,intrinsic_prefix_1>]β Emit unknown intrinsics as calls to external functions. A comma-separated input list of intrinsic prefixes must be provided, and only intrinsics carrying a listed prefix get emitted as described. (note the optional-ish bracket situation, it's a whole vibe)--spv-dump-depsβ Dump MIR with SPIR-V dependencies info.--spv-emit-nonsemantic-debug-infoβ Emit SPIR-VNonSemantic.Shader.DebugInfo.100instructions π--summary-file=<string>β The summary file to use for function importing.--sve-tail-folding=<string>β Control the use of vectorisation using tail-folding for SVE, where the option is specified in the form(Initial)[+(Flag1|Flag2|...)]. The values:disabledβ (Initial) No loop types will vectorize using tail-folding.defaultβ (Initial) Uses the default tail-folding settings for the target CPU.allβ (Initial) All legal loop types will vectorize using tail-folding.simpleβ (Initial) Use tail-folding for simple loops (not reductions or recurrences).reductionsβ Use tail-folding for loops containing reductions.noreductionsβ Inverse of above.recurrencesβ Use tail-folding for loops containing fixed order recurrences.norecurrencesβ Inverse of above.reverseβ Use tail-folding for loops requiring reversed predicates.noreverseβ Inverse of above.
still going, bestie, don't you dare close the tab yet π
--tail-predication=<value>β bestie this one is the MVE tail-predication pass options, and let me tell you, it has choices:=disabledβ Don't tail-predicate loops π«=enabled-no-reductionsβ Enable tail-predication, but not for reduction loops=enabledβ Enable tail-predication, including reduction loops β¨=force-enabled-no-reductionsβ Enable tail-predication, but not for reduction loops, and force this which might be unsafe π¬=force-enabledβ Enable tail-predication, including reduction loops, and force this which might be unsafe π
okay so for the *force* ones: the manpage literally says "might be unsafe". I am not making that up. proceed with the caution of someone touching a hot pan π
--target-abi=<string>β the name of the ABI to be targeted from the backend--thinlto-assume-mergedβ assume the input has already undergone ThinLTO function importing and the other pre-optimization pipeline changes--threads=<int>β that's it. that's the whole note. no description given π--translator-compatibility-modeβ SPIR-V Translator compatibility mode--ubsan-guard-checksβ guard UBSAN checks withllvm.allow.ubsan.check()--use-undefβ use undef when generating programs--verify-region-infoβ verify region info. heads up, it's time consuming β³--vp-counters-per-site=<number>β the average number of profile counters allocated per value profiling site--vp-static-allocβ do static counter allocation for value profiler--wasm-enable-ehβ WebAssembly exception handling--wasm-enable-sjljβ WebAssembly setjmp/longjmp handling--wasm-use-legacy-ehβ WebAssembly exception handling (legacy)--x86-align-branch=<string>β specify types of branches to align (plus separated list of types):jccβ indicates conditional jumpsfusedβ indicates fused conditional jumpsjmpβ indicates direct unconditional jumpscallβ indicates direct and indirect callsretβ indicates retsindirectβ indicates indirect unconditional jumps
--x86-align-branch-boundary=<uint>β control how the assembler should align branches with NOP. If the boundary's size is not 0, it should be a power of 2 and no less than 32. Branches will be aligned to prevent from being across or against the boundary of specified size. The default value0does not align branches π―--x86-branches-within-32B-boundariesβ align selected instructions to mitigate negative performance impact of Intel's micro code update for errata skx102.
β οΈ may break assumptions about labels corresponding to particular instructions, and should be used with caution. fr fr, read that twice.
--x86-enable-apx-for-relocationβ enable APX features (EGPR, NDD and NF) for instructions with relocations on x86-64 ELF--x86-pad-max-prefix-size=<uint>β maximum number of prefixes to use for padding--x86-relax-relocationsβ emitGOTPCRELX/REX_GOTPCRELX/CODE_4_GOTPCRELXinstead ofGOTPCRELon x86-64 ELF--x86-sse2avxβ specify that the assembler should encode SSE instructions with VEX prefix
β¨ Generic Options β¨
the little guys every program has, but make it iconic π
--helpβ display available options (--help-hiddenfor more)--help-listβ display list of available options (--help-list-hiddenfor more)--versionβ display the version of this program
πΈ IR2Vec Options πΈ
--ir2vec-arg-weight=<number>β weight for argument embeddings--ir2vec-kind=<value>β IR2Vec embedding kind=symbolicβ generate symbolic embeddings=flow-awareβ generate flow-aware embeddings
--ir2vec-opc-weight=<number>β weight for opcode embeddings--ir2vec-type-weight=<number>β weight for type embeddings--ir2vec-vocab-path=<string>β path to the vocabulary file for IR2Vec
π¦ MIR2Vec Options π¦
--mir2vec-common-operand-weight=<number>β weight for common operand embeddings--mir2vec-kind=<value>β MIR2Vec embedding kind=symbolicβ generate symbolic embeddings for MIR
--mir2vec-opc-weight=<number>β weight for machine opcode embeddings--mir2vec-reg-operand-weight=<number>β weight for register operand embeddings--mir2vec-vocab-path=<string>β path to the vocabulary file for MIR2Vec
π Polly Options π
Configure the polly loop optimizer. she's got range, bestie, look at this list π
--pollyβ enable the polly optimizer (with-O1,-O2or-O3)--polly-2nd-level-tilingβ enable a 2nd level loop of loop tiling--polly-annotate-metadata-vectorizeβ append vectorize enable/disable metadata from polly--polly-ast-print-accessesβ print memory access functions--polly-context=<isl parameter set>β provide additional constraints on the context parameters--polly-dce-precise-steps=<int>β the number of precise steps between two approximating iterations. (A value of-1schedules another approximation stage before the actual dead code elimination.--polly-delicm-max-ops=<int>β maximum number of isl operations to invest for lifetime analysis;0=no limit--polly-detect-full-functionsβ allow the detection of full functions--polly-dump-afterβ dump module after Polly transformations into a file suffixed with"-after"--polly-dump-after-file=<string>β dump module after Polly transformations to the given file--polly-dump-beforeβ dump module before Polly transformations into a file suffixed with"-before"--polly-dump-before-file=<string>β dump module before Polly transformations to the given file--polly-enable-simplifyβ simplify SCoP after optimizations--polly-ignore-func=<string>β ignore functions that match a regex. Multiple regexes can be comma separated. Scop detection will ignore all functions that match ANY of the regexes provided.--polly-isl-arg=<argument>β option passed to ISL--polly-matmul-optβ perform optimizations of matrix multiplications based on pattern matching--polly-on-isl-error-abortβ abort if an isl error is encountered--polly-only-func=<string>β only run on functions that match a regex. Multiple regexes can be comma separated. Scop detection will run on all functions that match ANY of the regexes provided.--polly-only-region=<identifier>β only run on certain regions (The provided identifier must appear in the name of the region's entry block--polly-only-scop-detectionβ only run scop detection, but no other optimizations--polly-optimized-scopsβ Polly - Dump polyhedral description of Scops optimized with the isl scheduling optimizer and the set of post-scheduling transformations is applied on the schedule tree--polly-parallelβ generate thread parallel code (isl codegen only)--polly-parallel-forceβ force generation of thread parallel code ignoring any cost model--polly-pattern-matching-based-optsβ perform optimizations based on pattern matching--polly-postoptsβ apply post-rescheduling optimizations such as tiling (requires-polly-reschedule)--polly-pragma-based-optsβ apply user-directed transformation from metadata--polly-pragma-ignore-depcheckβ skip the dependency check for pragma-based transformations--polly-print-astβ print the ISL abstract syntax tree--polly-print-delicmβ Polly - Print DeLICM/DePRE--polly-print-depsβ Polly - Print dependences--polly-print-detectβ Polly - Print static control parts (SCoPs)--polly-print-flatten-scheduleβ a polly pass--polly-print-import-jscopβ Polly - Print Scop import result--polly-print-mseβ Polly - Print Maximal static expansion of SCoP--polly-print-opt-islβ a polly pass. that's it, that's the whole description π«Ά (the manpage really said "a polly pass" and dipped, and honestly? respect.)--polly-print-optreeβ Polly, bestie, print the forward operand tree result π³--polly-print-scopsβ prints the polyhedral description of all the regions β¨--polly-print-simplifyβ Polly says: show me the Simplify actions π--polly-process-unprofitableβ go ahead and process the scops that are unlikely to benefit from Polly optimizations. lowkey a "do it anyway" flag, no cap π--polly-register-tilingβ enable register tiling, slay π--polly-reportβ print info about what Polly's been up to. it's giving activity tracker π--polly-rescheduleβ optimize SCoPs using ISL π₯--polly-showβ highlight the code regions that are gonna get optimized β and it does it in a CFG, BBs, and LLVM-IR instructions</>, all of it, the whole fit β¨--polly-show-onlyβ same highlight energy, but the only place you get it is the CFG (BBs only)</>. no LLVM-IR instructions invited to this party π--polly-stmt-granularity=<value>β which algorithm do we use to split basic blocks into multiple statements? pick your fighter:=bbβ one statement per basic block=scalar-indepβ the scalar independence heuristic=storeβ store-level granularity
--polly-tc-optβ do optimizations of tensor contractions based on pattern matching π§--polly-tilingβ enable loop tiling π¦--polly-vectorizer=<value>β select the vectorization strategy, choose wisely bestie:=noneβ no Vectorization π«=stripmineβ strip-mine the outer loops so the loop-vectorizer actually triggers π
and that's a wrap on the polly pack, my love π you read all of it, you're literally the main character of man pages rn π
little credits moment: this page ismodularizeversion22, datedSeptember 2026, and you're living inMODULARIZE(1)β periodt. π β
π¦ where this page comes from
- ubuntu stonking: clang-tools-22 1:22.1.8-1ubuntu1 Β· APACHE-2-LLVM-EXCEPTIONS
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