MODULARIZE(1)
π MODULARIZE π
okay bestie, so this is modularize, from the User Commands corner of the manual (that's manual section 1, iykyk), and it's the page for modularize 13. no cap. π
β¨ NAME β¨
modularize β the manual page for modularize 13. that's it, that's the whole name section, short and iconic π
π¦ DESCRIPTION π¦
OVERVIEW: modularize. yes queen, that's the entire overview. she's mysterious. she's giving minimalism. π«Ά
USAGE:
modularize [options] <list of one or more header list files> <arguments to be passed to front end>...
so like β you hand her options, then a <list of one or more header list files>, and then whatever <arguments to be passed to front end> you've got. that's the whole vibe. πΈ
OPTIONS:
π OPTIONS π
π Color Options π
--colorβ use colors in output (default=autodetect). literally the glow-up setting for your terminal π
π General options π
-I=<path>β include path for the coverage check. π--aarch64-neon-syntax=<value>β choose the style of NEON code to emit from the AArch64 backend:=genericβ emit generic NEON assembly=appleβ emit Apple-style NEON assembly π
--aarch64-use-aaβ enable the use of AA during codegen.--abort-on-max-devirt-iterations-reachedβ abort when the max iterations for the devirtualization CGSCC repeat pass is reached π--addrsigβ emit an address-significance table--allow-ginsert-as-artifactβ allowG_INSERTto be considered an artifact. hack around AMDGPU test infinite loops. π--amdgpu-bypass-slow-divβ skip 64-bit divide for dynamic 32-bit values--amdgpu-disable-loop-alignmentβ do not align and prefetch loops--amdgpu-disable-power-schedβ disable scheduling to minimize mAI power bursts--amdgpu-dpp-combineβ enable DPP combiner--amdgpu-dump-hsa-metadataβ dump AMDGPU HSA Metadata--amdgpu-enable-flat-scratchβ use flat scratch instructions--amdgpu-enable-merge-m0β merge and hoist M0 initializations--amdgpu-promote-alloca-to-vector-limit=<uint>β maximum byte size to consider when promoting alloca to vector--amdgpu-reserve-vgpr-for-sgpr-spillβ allocates one VGPR for future SGPR spill--amdgpu-sdwa-peepholeβ enable SDWA peepholer π--amdgpu-use-aa-in-codegenβ enable the use of AA during codegen.--amdgpu-verify-hsa-metadataβ verify AMDGPU HSA Metadata--amdgpu-vgpr-index-modeβ use GPR indexing mode instead of movrel for vector indexing--arm-add-build-attributesβ (no description in the original, she's just there, being mysterious π)--arm-implicit-it=<value>β allow conditional instructions outdside of an IT block (yes, "outdside" β that's exactly how the original spells it, we keep it verbatim bestie π ):=alwaysβ accept in both ISAs, emit implicit ITs in Thumb=neverβ warn in ARM, reject in Thumb=armβ accept in ARM, reject in Thumb=thumbβ warn in ARM, emit implicit ITs in Thumb
--asm-show-instβ emit internal instruction representation to the assembly file--atomic-counter-update-promotedβ do counter update using atomic fetch add for promoted counters only--atomic-first-counterβ use atomic fetch add for the first counter in a function (usually the entry counter)--basic-block-sections=<all | <function list (file)> | labels | none>β emit basic blocks into separate sections--block-check-header-list-onlyβ only warn if#includedirectives are inside extern or namespace blocks if the included header is in the header list.--bounds-checking-single-trapβ use one trap block per function--cfg-hide-cold-paths=<number>β hide blocks with relative frequency below the given value π₯Ά--cfg-hide-deoptimize-pathsβ (no description in the original)--cfg-hide-unreachable-pathsβ (no description in the original)--code-model=<value>β choose the code model:=tinyβ tiny code model=smallβ small code model=kernelβ kernel code model=mediumβ medium code model=largeβ large code model
--cost-kind=<value>β target cost kind:=throughputβ reciprocal throughput=latencyβ instruction latency=code-sizeβ code size=size-latencyβ code size and latency
--coverage-check-onlyβ only do the coverage check.--data-sectionsβ emit data into separate sections--debug-entry-valuesβ enable debug info for the debug entry values.--debugger-tune=<value>β tune debug info for a particular debugger:=gdbβ gdb=lldbβ lldb=dbxβ dbx=sceβ SCE targets (e.g. PS4)
--debugify-level=<value>β kind of debug info to add:=locationsβ locations only=location+variablesβ locations and variables
--debugify-quietβ suppress verbose debugify output π€«--denormal-fp-math=<value>β select which denormal numbers the code is permitted to require:=ieeeβ IEEE 754 denormal numbers=preserve-signβ the sign of a flushed-to-zero number is preserved in the sign of 0=positive-zeroβ denormals are flushed to positive zero
--denormal-fp-math-f32=<value>β select which denormal numbers the code is permitted to require for float:=ieeeβ IEEE 754 denormal numbers=preserve-signβ the sign of a flushed-to-zero number is preserved in the sign of 0=positive-zeroβ denormals are flushed to positive zero
--disable-i2p-p2i-optβ disables inttoptr/ptrtoint roundtrip optimization--disable-promote-alloca-to-ldsβ disable promote alloca to LDS--disable-promote-alloca-to-vectorβ disable promote alloca to vector--disable-tail-callsβ never emit tail calls--display-file-listsβ display lists of good files (no compile errors), problem files, and a combined list with problem files preceded by a'#'.--do-counter-promotionβ do counter register promotion--dot-cfg-mssa=<file name for generated dot file>β file name for generated dot file--dwarf-version=<int>β Dwarf version--dwarf64β generate debugging info in the 64-bit DWARF format--emit-call-site-infoβ emit call site debug information, if debug information is enabled.--emscripten-cxx-exceptions-allowed=<string>β the list of function names in which Emscripten-style exception handling is enabled (see emscriptenEMSCRIPTEN_CATCHING_ALLOWEDoptions)--emulated-tlsβ use emulated TLS model--enable-cse-in-irtranslatorβ should enable CSE in irtranslator--enable-cse-in-legalizerβ should enable CSE in Legalizer--enable-emscripten-cxx-exceptionsβ WebAssembly Emscripten-style exception handling--enable-emscripten-sjljβ WebAssembly Emscripten-style setjmp/longjmp handling--enable-gvn-hoistβ enable the GVN hoisting pass (default = off)--enable-gvn-memdepβ (no description in the original)--enable-gvn-sinkβ enable the GVN sinking pass (default = off)--enable-load-in-loop-preβ (no description in the original)--enable-load-preβ (no description in the original)--enable-loop-simplifycfg-term-foldingβ (no description in the original)--enable-name-compressionβ enable name/filename string compression--enable-no-infs-fp-mathβ enable FP math optimizations that assume no+-Infs--enable-no-nans-fp-mathβ enable FP math optimizations that assume no NaNs--enable-no-signed-zeros-fp-mathβ enable FP math optimizations that assume the sign of 0 is insignificant--enable-no-trapping-fp-mathβ enable setting the FP exceptions build attribute not to use exceptions--enable-split-backedge-in-load-preβ (no description in the original)--enable-unsafe-fp-mathβ enable optimizations that may decrease FP precision β οΈ--exception-model=<value>β exception model:=defaultβ default exception handling model=dwarfβ DWARF-like CFI based exception handling=sjljβ SjLj exception handling=armβ ARM EHABI exceptions=winehβ Windows exception model=wasmβ WebAssembly exception handling
okay that's the end of part one bestie, there's more coming, don't go anywhere π
okay bestie we're back in the flag pile and it's giving β¨infinite optionsβ¨ β every single one, no skips, periodt π
--execute-concurrency=<uint>β the number of threads used to process all files in parallel. set it to0and you just get hardware concurrency π§΅ heads up tho: this flag only applies to all-TUs.--executor=<string>β the name of the executor to use. pick your fighter π«Ά--experimental-debug-variable-locationsβ use experimental new value-tracking variable locations π§ͺ (yes the word experimental is right there, it's giving lab rat)--fatal-warningsβ treat warnings as errors. no more "lol it's just a warning" energy π€--filetype=<value>β choose a file type (not all types are supported by all targets, so don't come for me):=asmβ emit an assembly ('.s') file=objβ emit a native object ('.o') file=nullβ emit nothing, for performance testing
--filter=<string>β only process files that match this filter. β οΈ this flag only applies to all-TUs.--float-abi=<value>β choose float ABI type:=defaultβ target default float ABI type=softβ soft float ABI (implied by-soft-float)=hardβ hard float ABI (uses FP registers)
--force-dwarf-frame-sectionβ always emit a debug frame section. every single time, no skipping π--force-opaque-pointersβ force all pointers to be opaque pointers π» spooky but make it compiler--fp-contract=<value>β enable aggressive formation of fused FP ops:=fastβ fuse FP ops whenever profitable=onβ only fuse 'blessed' FP ops.=offβ only fuse FP ops when the result won't be affected.
--frame-pointer=<value>β specify frame pointer elimination optimization:=allβ disable frame pointer elimination=non-leafβ disable frame pointer elimination for non-leaf frame=noneβ enable frame pointer elimination
--function-sectionsβ emit functions into separate sections βοΈ one function, one section, clean girl aesthetic--gpsize=<uint>β Global Pointer Addressing Size. the default size is8.--hash-based-counter-splitβ rename counter variable of a comdat function based on cfg hash--hot-cold-splitβ enable hot-cold splitting pass π₯π§--ignore-xcoff-visibilityβ not emit the visibility attribute for asm in AIX OS or give all symbols 'unspecified' visibility in XCOFF object file--import-all-indexβ import all external functions in index.--incremental-linker-compatibleβ when used withfiletype=obj, emit an object file which can be used with an incremental linker--instcombine-code-sinkingβ enable code sinking--instcombine-guard-widening-window=<uint>β how wide an instruction window to bypass looking for another guard--instcombine-max-iterations=<uint>β limit the maximum number of instruction combining iterations--instcombine-max-num-phis=<uint>β maximum number phis to handle in intptr/ptrint folding--instcombine-maxarray-size=<uint>β maximum array size considered when doing a combine--instcombine-negator-enabledβ should we attempt to sink negations?--instcombine-negator-max-depth=<uint>β what is the maximal lookup depth when trying to check for viability of negation sinking.--instrprof-atomic-counter-update-allβ make all profile counter updates atomic (for testing only π§ͺ)--internalize-public-api-file=<filename>β a file containing list of symbol names to preserve--internalize-public-api-list=<list>β a list of symbol names to preserve--iterative-counter-promotionβ allow counter promotion across the whole loop nest.--lto-embed-bitcode=<value>β embed LLVM bitcode in object files produced by LTO:=noneβ do not embed=optimizedβ embed after all optimization passes=post-merge-pre-optβ embed post merge, but before optimizations
--lto-pass-remarks-filter=<regex>β only record optimization remarks from passes whose names match the given regular expression--lto-pass-remarks-format=<format>β the format used for serializing remarks (default:YAML)--lto-pass-remarks-output=<filename>β output filename for pass remarks--march=<string>β architecture to generate code for (see--version) ποΈ--matrix-default-layout=<value>β sets the default matrix layout:=column-majorβ use column-major layout=row-majorβ use row-major layout
--mattr=<a1,+a2,-a3,...>β target specific attributes (-mattr=helpfor details)--max-counter-promotions=<int>β max number of allowed counter promotions--max-counter-promotions-per-loop=<uint>β max number counter promotions per loop to avoid increasing register pressure too much--mc-relax-allβ when used withfiletype=obj, relax all fixups in the emitted object file π relax, you're doing great--mcpu=<cpu-name>β target a specific cpu type (-mcpu=helpfor details)--meabi=<value>β set EABI type (default depends on triple):=defaultβ triple default EABI version=4β EABI version 4=5β EABI version 5=gnuβ EABI GNU
--merror-missing-parenthesisβ error for missing parenthesis around predicate registers--merror-noncontigious-registerβ error for register names that aren't contigious--mhvxβ enable Hexagon Vector eXtensions π--mhvx=<value>β enable Hexagon Vector eXtensions:=v60β build for HVX v60=v62β build for HVX v62=v65β build for HVX v65=v66β build for HVX v66=v67β build for HVX v67=v68β build for HVX v68
--mips-compact-branches=<value>β MIPS Specific: Compact branch policy.=neverβ do not use compact branches if possible.=optimalβ use compact branches where appropriate (default).=alwaysβ always use compact branches if possible.
--mips16-constant-islandsβ enable mips16 constant islands. ποΈ--mips16-hard-floatβ enable mips16 hard float.--mir-strip-debugify-onlyβ shouldmir-strip-debugonly strip debug info from debugified modules by default--mno-compoundβ disable looking for compound instructions for Hexagon--mno-fixupβ disable fixing up resolved relocations for Hexagon--mno-ldc1-sdc1β expand double precision loads and stores to their single precision counterparts--mno-pairingβ disable looking for duplex instructions for Hexagon--module-map-path=<string>β turn on module map output and specify output path or file name. if no path is specified and ifprefixoption is specified, useprefixfor file path.--mwarn-missing-parenthesisβ warn for missing parenthesis around predicate registers--mwarn-noncontigious-registerβ warn for register names that arent contigious--mwarn-sign-mismatchβ warn for mismatching a signed and unsigned value--no-coverage-checkβ don't do the coverage check.--no-deprecated-warnβ suppress all deprecated warnings--no-discriminatorsβ disable generation of discriminator information.--no-type-checkβ suppress type errors (Wasm)--no-warnβ suppress all warnings π silence, bestie--no-xray-indexβ don't emitxray_fn_idxsection--nozero-initialized-in-bssβ don't place zero-initialized symbols into bss section--nvptx-sched4regβ NVPTX Specific: schedule for register pressue--poison-checking-function-localβ check that returns are non-poison (for testing β οΈ)--prefix=<string>β prepend header file paths with this prefix. if not specified, the files are considered to be relative to the header list file.--problem-files-list=<string>β list of files with compilation or modularization problems for assistant mode. this will be excluded. π--pseudo-probe-for-profilingβ emits pseudo probes for AutoFDO β¨--r600-ir-structurizeβ uses the StructurizeCFG IR pass π§--rdf-dumpβ no description bestie, she's mysterious π--rdf-limit=<uint>β also no description, also iconic π--relax-elf-relocationsβ emitGOTPCRELX/REX_GOTPCRELXinstead ofGOTPCRELon x86-64 ELF π₯--relocation-model=<value>β pick your relocation model, choose your fighter:=staticβ non-relocatable code=picβ fully relocatable, position independent code=dynamic-no-picβ relocatable external references, non-relocatable code=ropiβ code and read-only data relocatable, accessed PC-relative=rwpiβ read-write data relocatable, accessed relative to static base=ropi-rwpiβ combination of ropi and rwpi π«Ά
--root-module=<string>β specify the name of the root module.--runtime-counter-relocationβ enable relocating counters at runtime.--safepoint-ir-verifier-print-onlyβ no description given, just vibes π--sample-profile-check-record-coverage=<N>β emit a warning if less than N% of records in the input profile are matched to the IR.--sample-profile-check-sample-coverage=<N>β emit a warning if less than N% of samples in the input profile are matched to the IR.--sample-profile-max-propagate-iterations=<uint>β maximum number of iterations to go through when propagating sample block/edge weights through the CFG.--skip-ret-exit-blockβ suppress counter promotion if exit blocks containret.--speculative-counter-promotion-max-exiting=<uint>β the max number of exiting blocks of a loop to allow speculative counter promotion--speculative-counter-promotion-to-loopβ when the option is false, if the target block is in a loop, the promotion will be disallowed unless the promoted counter update can be further/iteratively promoted into an acyclic region.--split-machine-functionsβ split out cold basic blocks from machine functions based on profile information πΈ--stack-size-sectionβ emit a section containing stack size metadata--stack-symbol-orderingβ order local stack symbols.--stackrealignβ force align the stack to the minimum alignment--strict-dwarfβ use strict dwarf--summary-file=<string>β the summary file to use for function importing.--tail-predication=<value>β MVE tail-predication pass options:=disabledβ don't tail-predicate loops=enabled-no-reductionsβ enable tail-predication, but not for reduction loops=enabledβ enable tail-predication, including reduction loops=force-enabled-no-reductionsβ enable tail-predication, but not for reduction loops, and force this which might be unsafe=force-enabledβ enable tail-predication, including reduction loops, and force this which might be unsafe
bestie the force- ones literally say "might be unsafe" ok, that's a red flag with a bow on it π proceed accordingly.
--tailcalloptβ turnfastcccalls into tail calls by (potentially) changing ABI.--thinlto-assume-mergedβ assume the input has already undergone ThinLTO function importing and the other pre-optimization pipeline changes.--thread-model=<value>β choose threading model:=posixβ POSIX thread model=singleβ single thread model
--threads=<int>β no description, she's just there π--tls-size=<uint>β bit size of immediate TLS offsets--unique-basic-block-section-namesβ give unique names to every basic block section--unique-section-namesβ give unique names to every section--use-ctorsβ use.ctorsinstead of.init_array.--vec-extabiβ enable the AIX Extended Altivec ABI.--verify-region-infoβ verify region info (time consuming) π--vp-counters-per-site=<number>β the average number of profile counters allocated per value profiling site.--vp-static-allocβ do static counter allocation for value profiler--x86-align-branch=<string>β specify types of branches to align (plus separated list of types):jccβ indicates conditional jumpsfusedβ indicates fused conditional jumpsjmpβ indicates direct unconditional jumpscallβ indicates direct and indirect callsretβ indicates retsindirectβ indicates indirect unconditional jumps
--x86-align-branch-boundary=<uint>β control how the assembler should align branches withNOP. If the boundary's size is not0, it should be a power of 2 and no less than32. Branches will be aligned to prevent from being across or against the boundary of specified size. The default value0does not align branches.--x86-branches-within-32B-boundariesβ align selected instructions to mitigate negative performance impact of Intel's micro code update for errataskx102.
May break assumptions about labels corresponding to particular instructions, and should be used with caution. β οΈ
--x86-pad-max-prefix-size=<uint>β maximum number of prefixes to use for padding--xcoff-traceback-tableβ emit the XCOFF traceback table
π Generic Options π
--helpβ display available options (--help-hiddenfor more) π«Ά--help-listβ display list of available options (--help-list-hiddenfor more)--versionβ display the version of this program
π Polly Options: Configure the polly loop optimizer π
--pollyβ enable the polly optimizer (with-O1,-O2or-O3)--polly-2nd-level-tilingβ enable a 2nd level loop of loop tiling--polly-ast-print-accessesβ print memory access functions--polly-context=<isl parameter set>β provide additional constraints on the context parameters--polly-dce-precise-steps=<int>β the number of precise steps between two approximating iterations. (A value of-1schedules another approximation stage before the actual dead code elimination.--polly-delicm-max-ops=<int>β maximum number of isl operations to invest for lifetime analysis;0=no limit--polly-detect-full-functionsβ allow the detection of full functions--polly-dump-afterβ dump module after Polly transformations into a file suffixed with"-after"--polly-dump-after-file=<string>β dump module after Polly transformations to the given file--polly-dump-beforeβ dump module before Polly transformations into a file suffixed with"-before"--polly-dump-before-file=<string>β dump module before Polly transformations to the given file--polly-enable-simplifyβ simplify SCoP after optimizations--polly-ignore-func=<string>β ignore functions that match a regex. Multiple regexes can be comma separated. Scop detection will ignore all functions that match ANY of the regexes provided.--polly-isl-arg=<argument>β option passed to ISL--polly-on-isl-error-abortβ abort if an isl error is encountered--polly-only-func=<string>β only run on functions that match a regex. Multiple regexes can be comma separated. Scop detection will run on all functions that match ANY of the regexes provided.--polly-only-region=<identifier>β only run on certain regions (The provided identifier must appear in the name of the region's entry block--polly-only-scop-detectionβ only run scop detection, but no other optimizations--polly-optimized-scopsβ Polly - dump polyhedral description of Scops optimized with the isl scheduling optimizer and the set of post-scheduling transformations is applied on the schedule tree--polly-parallelβ generate thread parallel code (isl codegen only)--polly-parallel-forceβ force generation of thread parallel code ignoring any cost model--polly-pattern-matching-based-optsβ perform optimizations based on pattern matching β¨--polly-pragma-based-optsβ user-directed transformation from metadata, aka you tell it what to do via pragmas and it actually listens π--polly-process-unprofitableβ process scops that are unlikely to benefit from Polly optimizations. not a typo, not a joke, it's literally doing it anyway. sometimes you just let it cook π--polly-register-tilingβ enable register tiling β¨--polly-reportβ print information about the activities of Polly. it's giving spill the tea, but make it diagnostics π«Ά--polly-showβ highlight the code regions that will be optimized in a (CFG BBs and LLVM-IR instructions). glow-up reveal for your IR π--polly-show-onlyβ highlight the code regions that will be optimized in a (CFG only BBs). same vibe, smaller stage, no IR cameo π--polly-stmt-granularity=<value>β the algorithm to use for splitting basic blocks into multiple statements. pick your fighter:=bbβ one statement per basic block=scalar-indepβ scalar independence heuristic=storeβ store-level granularity π
--polly-target=<value>β the hardware to target=cpuβ generate CPU code
--polly-tilingβ enable loop tiling πΈ--polly-vectorizer=<value>β select the vectorization strategy=noneβ no Vectorization=pollyβ Polly internal vectorizer=stripmineβ strip-mine outer loops for the loop-vectorizer to trigger
and that's the whole page, bestie!! π¦ this was modularize, version 13, dated July 2023 β go forth and modularize responsibly, ily, no cap ππ§
π¦ where this page comes from
- ubuntu jammy: clang-tools-13 1:13.0.1-2ubuntu2.2 Β· APACHE-2-LLVM-EXCEPTIONS
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash on : a language model's rewrite of the original, under its terms