MODULARIZE(1)
π MODULARIZE(1) π
okay so hi bestie π welcome to the manual page for modularize β that's modularize 12, and it lives in section 1 of the manual, aka User Commands. Grab a boba, we're doing this π
β¨ NAME β¨
modularize β the manual page for modularize 12. That's literally it, that's the whole section π«Ά
π¦ DESCRIPTION π¦
OVERVIEW: modularize.
USAGE:
modularize [options] <list of one or more header list files> <arguments to be passed to front end>...
So you pass it your [options], then a list of one or more header list files, and then whatever arguments you want forwarded to the front end. That's the whole vibe β¨
π OPTIONS π
π Color Options π
--colorβ use colors in output (default=autodetect). She's giving β¨aestheticβ¨ but only when your terminal says it's that girl.
π General options π
-I=<path>β include path for the coverage check. Point her at the right place bestie π--aarch64-neon-syntax=<value>β choose the style of NEON code to emit from the AArch64 backend:=genericβ emit generic NEON assembly=appleβ emit Apple-style NEON assembly
--abort-on-max-devirt-iterations-reachedβ abort when the max iterations for the devirtualization CGSCC repeat pass is reached. She hits the limit, she stops, periodt π--addrsigβ emit an address-significance table.--amdgpu-bypass-slow-divβ skip 64-bit divide for dynamic 32-bit values.--amdgpu-disable-loop-alignmentβ do not align and prefetch loops.--amdgpu-disable-power-schedβ disable scheduling to minimize mAI power bursts.--amdgpu-dpp-combineβ enable DPP combiner.--amdgpu-dump-hsa-metadataβ dump AMDGPU HSA Metadata.--amdgpu-enable-flat-scratchβ use flat scratch instructions.--amdgpu-enable-merge-m0β merge and hoist M0 initializations.--amdgpu-promote-alloca-to-vector-limit=<uint>β maximum byte size to consider promote alloca to vector.--amdgpu-reserve-vgpr-for-sgpr-spillβ allocates one VGPR for future SGPR Spill.--amdgpu-sdwa-peepholeβ enable SDWA peepholer.--amdgpu-use-aa-in-codegenβ enable the use of AA during codegen.--amdgpu-verify-hsa-metadataβ verify AMDGPU HSA Metadata.--amdgpu-vgpr-index-modeβ use GPR indexing mode instead of movrel for vector indexing.--arm-add-build-attributesβ the source gives us no description for this one, bestie, but she's real and she's here π--arm-implicit-it=<value>β allow conditional instructions outside of an IT block:=alwaysβ accept in both ISAs, emit implicit ITs in Thumb=neverβ warn in ARM, reject in Thumb=armβ accept in ARM, reject in Thumb=thumbβ warn in ARM, emit implicit ITs in Thumb
--asm-show-instβ emit internal instruction representation to the assembly file.--atomic-counter-update-promotedβ do counter update using atomic fetch add for promoted counters only.--atomic-first-counterβ use atomic fetch add for the first counter in a function (usually the entry counter).--basic-block-sections=<all | <function list (file)> | labels | none>β emit basic blocks into separate sections.--block-check-header-list-onlyβ only warn if#includedirectives are inside extern or namespace blocks if the included header is in the header list.--bounds-checking-single-trapβ use one trap block per function.--cfg-hide-deoptimize-pathsβ no description in the source, but she's on the list π--cfg-hide-unreachable-pathsβ also flying description-free, iconic honestly π¦--code-model=<value>β choose code model:=tinyβ Tiny code model=smallβ Small code model=kernelβ Kernel code model=mediumβ Medium code model=largeβ Large code model
--cost-kind=<value>β target cost kind:=throughputβ reciprocal throughput=latencyβ instruction latency=code-sizeβ code size=size-latencyβ code size and latency
--coverage-check-onlyβ only do the coverage check. Nothing else, just the check π―--cvp-dont-add-nowrap-flagsβ description not supplied by the source, but noted π--data-sectionsβ emit data into separate sections.--debug-entry-valuesβ enable debug info for the debug entry values.--debugger-tune=<value>β tune debug info for a particular debugger:=gdbβ gdb=lldbβ lldb=sceβ SCE targets (e.g. PS4)
--debugify-level=<value>β kind of debug info to add:=locationsβ locations only=location+variablesβ locations and variables
--debugify-quietβ suppress verbose debugify output. shhh π€«--denormal-fp-math=<value>β select which denormal numbers the code is permitted to require:=ieeeβ IEEE 754 denormal numbers=preserve-signβ the sign of a flushed-to-zero number is preserved in the sign of 0=positive-zeroβ denormals are flushed to positive zero
--denormal-fp-math-f32=<value>β select which denormal numbers the code is permitted to require, for float:=ieeeβ IEEE 754 denormal numbers=preserve-signβ the sign of a flushed-to-zero number is preserved in the sign of 0=positive-zeroβ denormals are flushed to positive zero
--disable-promote-alloca-to-ldsβ disable promote alloca to LDS.--disable-promote-alloca-to-vectorβ disable promote alloca to vector.--disable-tail-callsβ never emit tail calls.--display-file-listsβ display lists of good files (no compile errors), problem files, and a combined list with problem files preceded by a'#'.--do-counter-promotionβ do counter register promotion.--dot-cfg-mssa=<file name for generated dot file>β file name for generated dot file.--dwarf-version=<int>β Dwarf version.--dwarf64β generate debugging info in the 64-bit DWARF format.--emit-call-site-infoβ emit call site debug information, if debug information is enabled.--emscripten-cxx-exceptions-allowed=<string>β the list of function names in which Emscripten-style exception handling is enabled (see emscriptenEMSCRIPTEN_CATCHING_ALLOWEDoptions).--emulated-tlsβ use emulated TLS model.--enable-cse-in-irtranslatorβ should enable CSE in irtranslator.--enable-cse-in-legalizerβ should enable CSE in Legalizer.--enable-emscripten-cxx-exceptionsβ WebAssembly Emscripten-style exception handling.--enable-emscripten-sjljβ WebAssembly Emscripten-style setjmp/longjmp handling.--enable-gvn-hoistβ enable the GVN hoisting pass (default = off).--enable-gvn-memdepβ source says nothing about this one, but it's here and we respect her π--enable-gvn-sinkβ enable the GVN sinking pass (default = off).--enable-load-in-loop-preβ no description given, still slaying π--enable-load-preβ likewise description-free, love that for her β¨--enable-loop-simplifycfg-term-foldingβ again, no description in the source πΈ--enable-name-compressionβ enable name/filename string compression.--enable-no-infs-fp-mathβ enable FP math optimizations that assume no +-Infs.--enable-no-nans-fp-mathβ enable FP math optimizations that assume no NaNs.--enable-no-signed-zeros-fp-mathβ enable FP math optimizations that assume the sign of 0 is insignificant.--enable-no-trapping-fp-mathβ enable setting the FP exceptions build attribute not to use exceptions.--enable-split-backedge-in-load-preβ no description supplied, but noted bestie π«Ά--enable-unsafe-fp-mathβ enable optimizations that may decrease FP precision. Careful with this one, okay? π--exception-model=<value>β exception model:=defaultβ default exception handling model=dwarfβ DWARF-like CFI based exception handling=sjljβ SjLj exception handling=armβ ARM EHABI exceptions=winehβ Windows exception model=wasmβ WebAssembly exception handling
--execute-concurrency=<uint>β the number of threads used to process all files in parallel. Set to0for hardware concurrency. This flag only applies to all-TUs.--executor=<string>β the name of the executor to use.--experimental-debug-variable-locationsβ use experimental new value-tracking variable locations. Experimental, so you know what that means π§ͺ--fatal-warningsβ treat warnings as errors. No chill, zero, none π--filetype=<value>β pick a file type, bestie (and no, not all types are supported by all targets):=asmβ emit an assembly (.s) file=objβ emit a native object (.o) file=nullβ emit nothing, for performance testing
--filter=<string>β only process files that match this filter. This flag only applies toall-TUs.--float-abi=<value>β choose float ABI type=defaultβ target default float ABI type=softβ soft float ABI (implied by-soft-float)=hardβ hard float ABI (uses FP registers)
--force-dwarf-frame-sectionβ always emit a debug frame section.--fp-contract=<value>β enable aggressive formation of fused FP ops=fastβ fuse FP ops whenever profitable=onβ only fuse 'blessed' FP ops.=offβ only fuse FP ops when the result won't be affected.
--frame-pointer=<value>β specify frame pointer elimination optimization=allβ disable frame pointer elimination=non-leafβ disable frame pointer elimination for non-leaf frame=noneβ enable frame pointer elimination
--function-sectionsβ emit functions into separate sections--gpsize=<uint>β global pointer addressing size. The default size is8.--hash-based-counter-splitβ rename counter variable of a comdat function based on cfg hash--hot-cold-splitβ enable hot-cold splitting pass--ignore-xcoff-visibilityβ not emit the visibility attribute for asm in AIX OS or give all symbols 'unspecified' visibility in XCOFF object file--import-all-indexβ import all external functions in index.--incremental-linker-compatibleβ when used with filetype=obj, emit an object file which can be used with an incremental linker--instcombine-code-sinkingβ enable code sinking--instcombine-guard-widening-window=<uint>β how wide an instruction window to bypass looking for another guard--instcombine-max-iterations=<uint>β limit the maximum number of instruction combining iterations--instcombine-max-num-phis=<uint>β maximum number phis to handle in intptr/ptrint folding--instcombine-maxarray-size=<uint>β maximum array size considered when doing a combine--instcombine-negator-enabledβ should we attempt to sink negations?--instcombine-negator-max-depth=<uint>β what is the maximal lookup depth when trying to check for viability of negation sinking.--instcombine-unsafe-select-transformβ enable poison-unsafe select to and/or transform--instrprof-atomic-counter-update-allβ make all profile counter updates atomic (for testing only)--internalize-public-api-file=<filename>β a file containing list of symbol names to preserve--internalize-public-api-list=<list>β a list of symbol names to preserve--iterative-counter-promotionβ allow counter promotion across the whole loop nest.--lto-embed-bitcode=<value>β embed LLVM bitcode in object files produced by LTO=noneβ do not embed=optimizedβ embed after all optimization passes=post-merge-pre-optβ embed post merge, but before optimizations
--lto-pass-remarks-filter=<regex>β only record optimization remarks from passes whose names match the given regular expression--lto-pass-remarks-format=<format>β the format used for serializing remarks (default: YAML)--lto-pass-remarks-output=<filename>β output filename for pass remarks--march=<string>β architecture to generate code for (see--version)--matrix-default-layout=<value>β sets the default matrix layout=column-majorβ use column-major layout=row-majorβ use row-major layout
--mattr=<a1,+a2,-a3,...>β target specific attributes (-mattr=helpfor details)--max-counter-promotions=<int>β max number of allowed counter promotions--max-counter-promotions-per-loop=<uint>β max number counter promotions per loop to avoid increasing register pressure too much--mc-relax-allβ when used with filetype=obj, relax all fixups in the emitted object file--mcpu=<cpu-name>β target a specific cpu type (-mcpu=helpfor details)--meabi=<value>β set EABI type (default depends on triple):=defaultβ triple default EABI version=4β EABI version 4=5β EABI version 5=gnuβ EABI GNU
--merror-missing-parenthesisβ error for missing parenthesis around predicate registers--merror-noncontigious-registerβ error for register names that aren't contigious--mhvxβ enable Hexagon Vector eXtensions--mhvx=<value>β enable Hexagon Vector eXtensions=v60β build for HVX v60=v62β build for HVX v62=v65β build for HVX v65=v66β build for HVX v66=v67β build for HVX v67
--mips-compact-branches=<value>β MIPS Specific: Compact branch policy.=neverβ do not use compact branches if possible.=optimalβ use compact branches where appropriate (default).=alwaysβ always use compact branches if possible.
--mips16-constant-islandsβ enable mips16 constant islands.--mips16-hard-floatβ enable mips16 hard float.--mir-strip-debugify-onlyβ should mir-strip-debug only strip debug info from debugified modules by default--mno-compoundβ disable looking for compound instructions for Hexagon--mno-fixupβ disable fixing up resolved relocations for Hexagon--mno-ldc1-sdc1β expand double precision loads and stores to their single precision counterparts--mno-pairingβ disable looking for duplex instructions for Hexagon--module-map-path=<string>β turn on module map output and specify output path or file name. If no path is specified and if prefix option is specified, use prefix for file path.--mwarn-missing-parenthesisβ warn for missing parenthesis around predicate registers--mwarn-noncontigious-registerβ warn for register names that arent contigious--mwarn-sign-mismatchβ warn for mismatching a signed and unsigned value--no-coverage-checkβ don't do the coverage check.--no-deprecated-warnβ suppress all deprecated warnings--no-discriminatorsβ disable generation of discriminator information.--no-warnβ suppress all warnings--no-xray-indexβ don't emitxray_fn_idxsection--nozero-initialized-in-bssβ don't place zero-initialized symbols into bss section--nvptx-sched4regβ NVPTX Specific: schedule for register pressue--poison-checking-function-localβ check that returns are non-poison (for testing)--prefix=<string>β prepend header file paths with this prefix. If not specified, the files are considered to be relative to the header list file.--problem-files-list=<string>β list of files with compilation or modularization problems for assistant mode. This will be excluded.--pseudo-probe-for-profilingβ emit pseudo probes for AutoFDO--r600-ir-structurizeβ use StructurizeCFG IR pass--rdf-dumpβ (no description in the original β it's giving mystery)--rdf-limit=<uint>β (no description in the original β it's giving mystery)--relax-elf-relocationsβ emit GOTPCRELX/REX_GOTPCRELX instead of GOTPCREL on x86-64 ELF--relocation-model=<value>β choose relocation model=staticβ non-relocatable code=picβ fully relocatable, position independent code
okay we're still deep in option city bestie, no exit yet, keep scrolling π
=dynamic-no-picβ relocatable external references but non-relocatable code=ropiβ code and read-only data are relocatable, and they get accessed PC-relative=rwpiβ read-write data is relocatable, accessed relative to the static base=ropi-rwpiβ both of the above, the iconic combo meal π--root-module=<string>β tell it the name of the root module--runtime-counter-relocationβ turns on relocating counters at runtime--safepoint-ir-verifier-print-onlyβ no description on the page for this one, it's giving mysterious π«₯--sample-profile-check-record-coverage=<N>β emits a warning if less than N% of the records in the input profile actually match up to the IR--sample-profile-check-sample-coverage=<N>β emits a warning if less than N% of the samples in the input profile match the IR--sample-profile-max-propagate-iterations=<uint>β max number of iterations it goes through when propagating sample block/edge weights through the CFG--skip-ret-exit-blockβ suppresses counter promotion if exit blocks containret--speculative-counter-promotion-max-exiting=<uint>β the max number of exiting blocks a loop can have for speculative counter promotion to be allowed--speculative-counter-promotion-to-loopβ when this is false and the target block is in a loop, promotion gets disallowed unless the promoted counter update can be further/iteratively promoted into an acyclic region--split-machine-functionsβ splits cold basic blocks out of machine functions, based on profile info--stack-alignment=<uint>β overrides the default stack alignment--stack-protector-guard=<string>β stack protector guard mode--stack-protector-guard-offset=<uint>β stack protector guard offset--stack-protector-guard-reg=<string>β stack protector guard register--stack-size-sectionβ emits a section that contains stack size metadata--stack-symbol-orderingβ orders local stack symbols--stackrealignβ forces the stack to align to the minimum alignment--summary-file=<string>β the summary file used for function importing--tail-predication=<value>β MVE tail-predication pass options, and it has moods:=disabledβ don't tail-predicate loops=enabled-no-reductionsβ enable tail-predication, but not for reduction loops=enabledβ enable tail-predication, including reduction loops=force-enabled-no-reductionsβ enable tail-predication but not for reduction loops, and force this which might be unsafe π=force-enabledβ enable tail-predication including reduction loops, and force this which might be unsafe π
--tailcalloptβ turnsfastcccalls into tail calls by (potentially) changing the ABI--thinlto-assume-mergedβ assumes the input has already been through ThinLTO function importing and the other pre-optimization pipeline changes--thread-model=<value>β choose your threading model:=posixβ POSIX thread model=singleβ single thread model
--threads=<int>β literally no description on the page, she's mysterious, she's lowkey hiding πΈ--tls-size=<uint>β bit size of immediate TLS offsets--unique-basic-block-section-namesβ gives unique names to every basic block section--unique-section-namesβ gives unique names to every section--use-ctorsβ uses.ctorsinstead of.init_array--vec-extabiβ enables the AIX Extended Altivec ABI--verify-region-infoβ verifies region info (heads up: it's time consuming β³)--vp-counters-per-site=<number>β the average number of profile counters allocated per value profiling site--vp-static-allocβ does static counter allocation for the value profiler--x86-align-branch=<string>β specify which types of branches to align, as a plus-separated list of types:jccβ indicates conditional jumpsfusedβ indicates fused conditional jumpsjmpβ indicates direct unconditional jumpscallβ indicates direct and indirect callsretβ indicates retsindirectβ indicates indirect unconditional jumps
--x86-align-branch-boundary=<uint>β controls how the assembler should align branches with NOP. If the boundary's size isn't0, it should be a power of 2 and no less than32. Branches get aligned so they don't end up across or against the boundary of the specified size. The default value0doesn't align branches at all.--x86-branches-within-32B-boundariesβ aligns selected instructions to mitigate the negative performance impact of Intel's micro code update for errataskx102.
β οΈ This may break assumptions about labels corresponding to particular instructions, and should be used with caution. Not a vibe to be reckless with, bestie π
--x86-pad-max-prefix-size=<uint>β maximum number of prefixes to use for padding--xcoff-traceback-tableβ emits the XCOFF traceback table
β¨ Generic Options β¨
--helpβ displays available options (--help-hiddenfor more)--help-listβ displays the list of available options (--help-list-hiddenfor more)--versionβ displays the version of this program
π Polly Options π
Configure the polly loop optimizer
--pollyβ enables the polly optimizer (only at-O3)--polly-2nd-level-tilingβ enables a 2nd level loop of loop tiling--polly-ast-print-accessesβ prints memory access functions--polly-context=<isl parameter set>β provides additional constraints on the context parameters--polly-dce-precise-steps=<int>β the number of precise steps between two approximating iterations. (A value of-1schedules another approximation stage before the actual dead code elimination.--polly-delicm-max-ops=<int>β maximum number of isl operations to invest for lifetime analysis;0=no limit--polly-detect-full-functionsβ allows the detection of full functions--polly-dump-afterβ dumps the module after Polly transformations into a file suffixed with"-after"--polly-dump-after-file=<string>β dumps the module after Polly transformations into the given file--polly-dump-beforeβ dumps the module before Polly transformations into a file suffixed with"-before"--polly-dump-before-file=<string>β dumps the module before Polly transformations into the given file--polly-enable-simplifyβ simplifies SCoP after optimizations--polly-ignore-func=<string>β ignores functions that match a regex. You can comma-separate multiple regexes. Scop detection will ignore all functions that match ANY of the regexes you provided.--polly-isl-arg=<argument>β option passed to ISL--polly-on-isl-error-abortβ aborts if an isl error is encountered--polly-only-func=<string>β only runs on functions matching a regex. Multiple regexes can be comma separated. Scop detection will run on all functions that match ANY of the regexes provided.--polly-only-region=<identifier>β only runs on certain regions (the provided identifier must appear in the name of the region's entry block--polly-only-scop-detectionβ only runs scop detection, no other optimizations--polly-optimized-scopsβ Polly - dumps the polyhedral description of Scops optimized with the isl scheduling optimizer, and the set of post-scheduling transformations is applied on the schedule tree--polly-parallelβ generates thread parallel code (isl codegen only)--polly-parallel-forceβ forces generation of thread parallel code, ignoring any cost model--polly-pattern-matching-based-optsβ performs optimizations based on pattern matching--polly-process-unprofitableβ processes scops that are unlikely to benefit from Polly optimizations--polly-register-tilingβ enables register tiling--polly-reportβ prints information about the activities of Polly
and that's where this part stops β there's more coming, don't you dare close the tab π«Ά
--polly-showβ lights up β¨the code regions that will be optimizedβ¨ β and it shows them in both the CFG BBs and the LLVM-IR instructions, so you get the whole glow-up in one look ππ₯--polly-show-onlyβ same energy, but only the CFG BBs get the highlight treatment. LLVM-IR instructions stay unbothered π--polly-stmt-granularity=<value>β picks which algorithm we use to split basic blocks into multiple statements. The algorithm choice is giving very important decisions, so here are your options:=bbβ one statement per basic block, simple as that π=scalar-indepβ the scalar independence heuristic, iykyk π§=storeβ store-level granularity, granular like a strawberry sugar scrub π
--polly-target=<value>β the hardware we're targeting, bestie. Which hardware, you ask?=cpuβ generate CPU code π»
--polly-tilingβ enable loop tiling π²β¨ not to be confused with bathroom tiling, but honestly? same satisfying vibe--polly-vectorizer=<value>β picks your vectorization strategy, main character energy only:=noneβ no vectorization. We're sitting this one out π=pollyβ Polly's own internal vectorizer, homegrown and iconic π=stripmineβ strip-mine outer loops so the loop-vectorizer can actually trigger. It's giving setup for success π
and that's a wrap on the whole page, bestie!! π this one's modularize, release 12, dated February 2022, and it goes by MODULARIZE(1) when it's being formal π¦ mwah, stan a well-documented man page π
π¦ where this page comes from
- ubuntu jammy: clang-tools-12 1:12.0.1-19ubuntu3 Β· APACHE-2-LLVM-EXCEPTIONS
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash on : a language model's rewrite of the original, under its terms