LLVM-MC(1)
🌸 NAME 🌸
llvm-mc — manual page for llvm-mc 11
✨ DESCRIPTION ✨
OVERVIEW: llvm machine code playground — no cap, this is where you come to play with machine code like it's a bestie's group chat. 💅
USAGE:
llvm-mc [options] <input file>🎀 OPTIONS 🎀
okay so here's the whole menu, bestie. we're going through every single one because that's just how we do it. ✨
🌈 Color Options 🌈
--color— Use colors in output (default=autodetect) — yes, it's giving rainbow realness 🌈
🌟 General options 🌟
-I=<directory>— Directory of include files — where the include files live, fr fr--aarch64-neon-syntax=<value>— Choose style of NEON code to emit from AArch64 backend:=generic— Emit generic NEON assembly=apple— Emit Apple-style NEON assembly
--amdgpu-bypass-slow-div— Skip 64-bit divide for dynamic 32-bit values--amdgpu-disable-loop-alignment— Do not align and prefetch loops--amdgpu-disable-power-sched— Disable scheduling to minimize mAI power bursts--amdgpu-dpp-combine— Enable DPP combiner--amdgpu-dump-hsa-metadata— Dump AMDGPU HSA Metadata--amdgpu-enable-global-sgpr-addr— Enable use of SGPR regs for GLOBAL LOAD/STORE instructions--amdgpu-enable-merge-m0— Merge and hoist M0 initializations--amdgpu-promote-alloca-to-vector-limit=<uint>— Maximum byte size to consider promote alloca to vector--amdgpu-reserve-vgpr-for-sgpr-spill— Allocates one VGPR for future SGPR Spill--amdgpu-sdwa-peephole— Enable SDWA peepholer--amdgpu-verify-hsa-metadata— Verify AMDGPU HSA Metadata--amdgpu-vgpr-index-mode— Use GPR indexing mode instead of movrel for vector indexing--arch=<string>— Target arch to assemble for, see-versionfor available targets--arm-add-build-attributes— (no description, just vibes) 🫶--arm-implicit-it=<value>— Allow conditional instructions outdside of an IT block=always— Accept in both ISAs, emit implicit ITs in Thumb=never— Warn in ARM, reject in Thumb=arm— Accept in ARM, reject in Thumb=thumb— Warn in ARM, emit implicit ITs in Thumb
--asm-show-inst— Emit internal instruction representation to assembly file
🎬 Action to perform:
--as-lex— Lex tokens from a .s file--assemble— Assemble a .s file (default)--disassemble— Disassemble strings of hex bytes--mdis— Marked up disassembly of strings of hex bytes--atomic-counter-update-promoted— Do counter update using atomic fetch add for promoted counters only--atomic-first-counter— Use atomic fetch add for first counter in a function (usually the entry counter)--bounds-checking-single-trap— Use one trap block per function--cfg-hide-deoptimize-paths— (no description, just vibes) ✨--cfg-hide-unreachable-paths— (no description, just vibes) ✨--compress-debug-sections=<value>— Choose DWARF debug sections compression:=none— No compression=zlib— Use zlib compression=zlib-gnu— Use zlib-gnu compression (deprecated) — bestie, deprecated means don't @ me 💀
--cost-kind=<value>— Target cost kind=throughput— Reciprocal throughput=latency— Instruction latency=code-size— Code size
--cvp-dont-add-nowrap-flags— (no description, just vibes) 🦋--debugify-level=<value>— Kind of debug info to add=locations— Locations only=location+variables— Locations and Variables
--debugify-quiet— Suppress verbose debugify output--defsym=<string>— Defines a symbol to be an integer constant--disable-promote-alloca-to-lds— Disable promote alloca to LDS--disable-promote-alloca-to-vector— Disable promote alloca to vector--do-counter-promotion— Do counter register promotion--dwarf-version=<int>— Dwarf version--dwarf64— Generate debugging info in the 64-bit DWARF format--emscripten-cxx-exceptions-allowed=<string>— The list of function names in which Emscripten-style exception handling is enabled (see emscriptenEMSCRIPTEN_CATCHING_ALLOWEDoptions)--enable-cse-in-irtranslator— Should enable CSE in irtranslator--enable-cse-in-legalizer— Should enable CSE in Legalizer--enable-emscripten-cxx-exceptions— WebAssembly Emscripten-style exception handling--enable-emscripten-sjlj— WebAssembly Emscripten-style setjmp/longjmp handling--enable-gvn-hoist— Enable the GVN hoisting pass (default = off)--enable-gvn-memdep— (no description, just vibes) 🌸--enable-gvn-sink— Enable the GVN sinking pass (default = off)--enable-load-in-loop-pre— (no description, just vibes) 🌸--enable-load-pre— (no description, just vibes) 🌸--enable-loop-simplifycfg-term-folding— (no description, just vibes) 🌸--enable-name-compression— Enable name/filename string compression--fatal-warnings— Treat warnings as errors — no more "it's just a warning" energy, periodt--fdebug-compilation-dir=<string>— Specifies the debug info's compilation dir--fdebug-prefix-map=<= separated key-value pairs>— Map file source paths in debug info--filetype=<value>— Choose an output file type:=asm— Emit an assembly ('.s') file=null— Don't emit anything (for timing purposes)=obj— Emit a native object ('.o') file
-g— Generate dwarf debugging info for assembly source files--gpsize=<uint>— Global Pointer Addressing Size. The default size is 8.--hash-based-counter-split— Rename counter variable of a comdat function based on cfg hash--hot-cold-split— Enable hot-cold splitting pass--import-all-index— Import all external functions in index.--incremental-linker-compatible— When used withfiletype=obj, emit an object file which can be used with an incremental linker--instcombine-code-sinking— Enable code sinking--instcombine-guard-widening-window=<uint>— How wide an instruction window to bypass looking for another guard--instcombine-max-iterations=<uint>— Limit the maximum number of instruction combining iterations--instcombine-max-num-phis=<uint>— Maximum number phis to handle in intptr/ptrint folding--instcombine-maxarray-size=<uint>— Maximum array size considered when doing a combine--instcombine-negator-enabled— Should we attempt to sink negations?--instcombine-negator-max-depth=<uint>— What is the maximal lookup depth when trying to check for viability of negation sinking.--instrprof-atomic-counter-update-all— Make all profile counter updates atomic (for testing only)--internalize-public-api-file=<filename>— A file containing list of symbol names to preserve--internalize-public-api-list=<list>— A list of symbol names to preserve--iterative-counter-promotion— Allow counter promotion across the whole loop nest.--large-code-model— Create cfi directives that assume the code might be more than 2gb away--lto-embed-bitcode— Embed LLVM bitcode in object files produced by LTO--lto-pass-remarks-filter=<regex>— Only record optimization remarks from passes whose names match the given regular expression--lto-pass-remarks-format=<format>— The format used for serializing remarks (default: YAML)--lto-pass-remarks-output=<filename>— Output filename for pass remarks--main-file-name=<string>— Specifies the name we should consider the input file--masm-integers— Enable binary and hex masm integers (0b110and0ABCh)--matrix-default-layout=<value>— Sets the default matrix layout=column-major— Use column-major layout=row-major— Use row-major layout
--mattr=<a1,+a2,-a3,...>— Target specific attributes (-mattr=helpfor details)--max-counter-promotions=<int>— Max number of allowed counter promotions--max-counter-promotions-per-loop=<uint>— Max number counter promotions per loop to avoid increasing register pressure too much--mc-relax-all— When used withfiletype=obj, relax all fixups in the emitted object file--mcpu=<cpu-name>— Target a specific cpu type (-mcpu=helpfor details)--memop-size-large=<uint>— Set large value thresthold in memory intrinsic size profiling. Value of 0 disables the large value profiling.--memop-size-range=<string>— Set the range of size in memory intrinsic calls to be profiled precisely, in a format of<start_val>:<end_val>--merror-missing-parenthesis— Error for missing parenthesis around predicate registers--merror-noncontigious-register— Error for register names that aren't contigious--mhvx— turn ON the Hexagon Vector eXtensions 🦋--mhvx=<value>— same thing but you get to pick which Hexagon Vector eXtensions, bestie:=v60— build it for HVX v60=v62— build it for HVX v62=v65— build it for HVX v65=v66— build it for HVX v66=v67— build it for HVX v67
--mips-compact-branches=<value>— MIPS Specific: the compact branch policy, iykyk 💅=never— don't use compact branches if you can possibly help it=optimal— use compact branches where it's appropriate (this is the default, so vibe with it) ✨=always— always use compact branches if possible, no thoughts head empty
--mips16-constant-islands— enable mips16 constant islands 🏝️--mips16-hard-float— enable mips16 hard float--mir-strip-debugify-only— shouldmir-strip-debugonly strip debug info from debugified modules by default--mno-compound— stop looking for compound instructions for Hexagon--mno-fixup— stop fixing up resolved relocations for Hexagon--mno-ldc1-sdc1— expand double precision loads and stores into their single precision counterparts--mno-pairing— stop looking for duplex instructions for Hexagon--mwarn-missing-parenthesis— warn when a predicate register is missing its parenthesis--mwarn-noncontigious-register— warn about register names that arent contigious (yes the spelling is exactly like that, do not come for me 😭)--mwarn-sign-mismatch— warn when you mismatch a signed and an unsigned value-n— don't assume the assembly file starts in the text section--no-deprecated-warn— suppress ALL deprecated warnings 🚫--no-discriminators— disable generation of discriminator information--no-exec-stack— this file doesn't need an exec stack--no-warn— suppress ALL warnings 🚫--nvptx-sched4reg— NVPTX Specific: schedule for register pressue (typo preserved, it's iconic 💀)-o=<filename>— output filename--output-asm-variant=<uint>— which syntax variant to use when printing the output--poison-checking-function-local— check that returns are non-poison (for testing 🧪)--position-independent— position independent--preserve-comments— keep the comments in the outputted assembly 🫶--print-imm-hex— prefer hex format for immediate values--r600-ir-structurize— use the StructurizeCFG IR pass--rdf-dump— that's it, that's the whole description 🙈 (the original literally leaves this one blank)--rdf-limit=<uint>— also blank in the original, mysterious main character energy 👑--relax-relocations— emitR_X86_64_GOTPCRELXinstead ofR_X86_64_GOTPCREL--runtime-counter-relocation— enable relocating counters at runtime--safepoint-ir-verifier-print-only— blank again, we love a cryptic queen ✨--sample-profile-check-record-coverage=<N>— emit a warning if less than N% of the records in the input profile got matched to the IR--sample-profile-check-sample-coverage=<N>— emit a warning if less than N% of the samples in the input profile got matched to the IR--sample-profile-max-propagate-iterations=<uint>— the maximum number of iterations to go through when propagating sample block/edge weights through the CFG--save-temp-labels— don't discard temporary labels--show-encoding— show instruction encodings 👀--show-inst— show the internal instruction representation--show-inst-operands— show instruction operands as parsed--speculative-counter-promotion-max-exiting=<uint>— the max number of exiting blocks of a loop to allow speculative counter promotion--speculative-counter-promotion-to-loop— when this option is false, if the target block is in a loop, the promotion will be disallowed unless the promoted counter update can be further/iteratively promoted into an acyclic region--split-dwarf-file=<filename>— DWO output filename--summary-file=<string>— the summary file to use for function importing--tail-predication=<value>— MVE tail-predication options 🌈=disabled— don't tail-predicate loops=enabled-no-reductions— enable tail-predication, but not for reduction loops=enabled— enable tail-predication, including reduction loops=force-enabled-no-reductions— enable tail-predication, but not for reduction loops, and force this which might be unsafe 😬=force-enabled— enable tail-predication, including reduction loops, and force this which might be unsafe 😬
--threads=<int>— blank in the original, it's giving mystery 💅--triple=<string>— the target triple to assemble for, see-versionfor available targets--verify-region-info— verify region info (this one is time consuming, so be warned 🕰️)--vp-counters-per-site=<number>— the average number of profile counters allocated per value profiling site--vp-static-alloc— do static counter allocation for the value profiler--x86-align-branch=<string>— specify types of branches to align (plus separated list of types):jcc— indicates conditional jumpsfused— indicates fused conditional jumpsjmp— indicates direct unconditional jumpscall— indicates direct and indirect callsret— indicates retsindirect— indicates indirect unconditional jumps
--x86-align-branch-boundary=<uint>— control how the assembler should align branches with NOP. If the boundary's size is not 0, it should be a power of 2 and no less than 32. Branches will be aligned to prevent from being across or against the boundary of specified size. The default value 0 does not align branches.--x86-branches-within-32B-boundaries— align selected instructions to mitigate the negative performance impact of Intel's micro code update for errata skx102
⚠️ This one may break assumptions about labels corresponding to particular instructions, and should be used with caution. Like, caution caution, bestie.
--x86-pad-max-prefix-size=<uint>— maximum number of prefixes to use for padding
Generic Options 🌸
--help— display available options (--help-hiddenfor more)--help-list— display a list of available options (--help-list-hiddenfor more)--version— display the version of this program
Polly Options: Configure the polly loop optimizer 🦋
--polly— enable the polly optimizer (only at-O3)--polly-2nd-level-tiling— enable a 2nd level loop of loop tiling--polly-ast-print-accesses— print memory access functions--polly-context=<isl parameter set>— provide additional constraints on the context parameters--polly-dce-precise-steps=<int>— the number of precise steps between two approximating iterations. (A value of-1schedules another approximation stage before the actual dead code elimination.--polly-delicm-max-ops=<int>— maximum number of isl operations to invest for lifetime analysis;0= no limit--polly-detect-full-functions— allow the detection of full functions--polly-dump-after— dump the module after Polly transformations into a file suffixed with"-after"--polly-dump-after-file=<string>— dump the module after Polly transformations to the given file--polly-dump-before— dump the module before Polly transformations into a file suffixed with"-before"--polly-dump-before-file=<string>— dump the module before Polly transformations to the given file--polly-enable-simplify— simplify SCoP after optimizations--polly-ignore-func=<string>— ignore functions that match a regex. Multiple regexes can be comma separated. Scop detection will ignore all functions that match ANY of the regexes provided.--polly-isl-arg=<argument>— option passed to ISL--polly-on-isl-error-abort— abort if an isl error is encountered 💀--polly-only-func=<string>— only run on functions that match a regex. Multiple regexes can be comma separated. Scop detection will run on all functions that match ANY of the regexes provided.--polly-only-region=<identifier>— only run on certain regions (The provided identifier must appear in the name of the region's entry block--polly-only-scop-detection— only run scop detection, but no other optimizations--polly-optimized-scops— Polly - dump the polyhedral description of Scops optimized with the isl scheduling optimizer and the set of post-scheduling transformations is applied on the schedule tree--polly-parallel— generate thread parallel code (isl codegen only)--polly-parallel-force— force generation of thread parallel code ignoring any cost model--polly-pattern-matching-based-opts— perform optimizations based on pattern matching--polly-process-unprofitable— let it cook even on the scops that probably won't get anything out of Polly's optimizations. lowkey generous of you tbh 💖--polly-register-tiling— turn on register tiling. yes bestie, we're tiling registers now ✨--polly-report— spills all the tea about what Polly is actually doing. prints info about Polly's activities, no cap 👑--polly-show— highlights the code regions that are gonna get optimized — and it's showing you both the CFG BBs and the LLVM-IR instructions. the full cinematic universe 🎬--polly-show-only— same energy, but it highlights the regions that will be optimized in the CFG only BBs. stripped-down version, still slaying 💅--polly-stmt-granularity=<value>— picks which algorithm gets used to split basic blocks into multiple statements. choose your fighter:=bb— one statement per basic block. simple, clean, iconic.=scalar-indep— the scalar independence heuristic 🌸=store— store-level granularity. granular, as the name suggests 🍓
--polly-target=<value>— which hardware we're targeting, bestie. gotta know your audience:=cpu— generate CPU code 💻
--polly-tiling— enable loop tiling. loops but make them cute little tiles 🎀--polly-vectorizer=<value>— pick your vectorization strategy, it's giving choose-your-own-adventure:=none— no vectorization. we're doing NOTHING today and that's valid 💀=polly— Polly's own internal vectorizer, homegrown and proud 🫶=stripmine— strip-mine the outer loops so the loop-vectorizer will trigger. setting the stage for the main character to walk in ⭐
and that's a wrap on this whole page, fr fr 🌈 that was llvm-mc from LLVM 11, dated January 2022, and you just read the whole LLVM-MC(1) manual like a champ. go forth and assemble something iconic, bestie 💜✨
📦 where this page comes from
- ubuntu jammy: llvm-11 1:11.1.0-6 · APACHE-2-LLVM-EXCEPTIONS
- 💖 girlified by deepseek-ai/DeepSeek-V4.1-Flash on : a language model's rewrite of the original, under its terms