LLI(1)
β¨ NAME β¨
lli β the manual page for lli 16, bestie π
π¦ DESCRIPTION π¦
OVERVIEW: llvm interpreter & dynamic compiler β yeah it literally interprets your bitcode and dynamically compiles it, main character energy fr fr π
USAGE:
lli [options] <input bitcode> <program arguments>...
OPTIONS:
π Color Options π
--colorβ do we want colors in the output? (default=autodetect) ππ
π General options π
-O <char>β picks your optimization level, and the only valid chars are[-O0, -O1, -O2, or -O3](default ='-O2') π₯--aarch64-neon-syntax=<value>β chooses which style of NEON code the AArch64 backend emits, obsessed:=genericβ emit generic NEON assembly=appleβ emit Apple-style NEON assembly π
--aarch64-use-aaβ enable the use of AA during codegen.--abort-on-max-devirt-iterations-reachedβ abort when the max iterations for the devirtualization CGSCC repeat pass is reached π--addrsigβ emit an address-significance table--align-loops=<uint>β the default alignment for loops--allow-ginsert-as-artifactβ allowG_INSERTto be considered an artifact. It's a hack around AMDGPU test infinite loops, iykyk π--amdgpu-bypass-slow-divβ skip the 64-bit divide for dynamic 32-bit values--amdgpu-disable-loop-alignmentβ do not align and prefetch loops--amdgpu-dpp-combineβ enable the DPP combiner--amdgpu-dump-hsa-metadataβ dump AMDGPU HSA Metadata--amdgpu-enable-merge-m0β merge and hoist M0 initializations--amdgpu-enable-power-schedβ enable scheduling to minimize mAI power bursts--amdgpu-promote-alloca-to-vector-limit=<uint>β the maximum byte size to consider when promoting alloca to vector--amdgpu-sdwa-peepholeβ enable the SDWA peepholer--amdgpu-use-aa-in-codegenβ enable the use of AA during codegen.--amdgpu-verify-hsa-metadataβ verify AMDGPU HSA Metadata--amdgpu-vgpr-index-modeβ use GPR indexing mode instead of movrel for vector indexing--arm-add-build-attributesβ (the page gives no description for this one bestie, it's just mysterious like that π)--arm-implicit-it=<value>β allow conditional instructions outside of an IT block:=alwaysβ accept in both ISAs, emit implicit ITs in Thumb=neverβ warn in ARM, reject in Thumb=armβ accept in ARM, reject in Thumb=thumbβ warn in ARM, emit implicit ITs in Thumb
--asm-show-instβ emit the internal instruction representation to the assembly file--atomic-counter-update-promotedβ do counter update using atomic fetch add, but only for promoted counters--atomic-first-counterβ use atomic fetch add for the first counter in a function (usually that's the entry counter)--basic-block-sections=<all | <function list (file)> | labels | none>β emit basic blocks into separate sections--bounds-checking-single-trapβ use one trap block per function--cfg-hide-cold-paths=<number>β hide blocks with relative frequency below the given value--cfg-hide-deoptimize-pathsβ (no description on the page, she's quiet π€«)--cfg-hide-unreachable-pathsβ (also no description, we love a low-key option)--code-model=<value>β choose your code model, iconic:=tinyβ Tiny code model=smallβ Small code model=kernelβ Kernel code model=mediumβ Medium code model=largeβ Large code model
--compile-threads=<uint>β choose the number of compile threads (jit-kind=orc-lazy only) π§΅--cost-kind=<value>β target cost kind:=throughputβ Reciprocal throughput=latencyβ Instruction latency=code-sizeβ Code size=size-latencyβ Code size and latency
--cs-profile-generateβ perform context sensitive PGO instrumentation--cs-profile-path=<string>β context sensitive profile file path--data-sectionsβ emit data into separate sections--debug-entry-valuesβ enable debug info for the debug entry values.--debug-info-correlateβ use debug info to correlate profiles.--debugger-tune=<value>β tune debug info for a particular debugger:=gdbβ gdb=lldbβ lldb=dbxβ dbx=sceβ SCE targets (e.g. PS4)
--debugify-func-limit=<ulong>β set the max number of processed functions per pass.--debugify-level=<value>β the kind of debug info to add:=locationsβ Locations only=location+variablesβ Locations and Variables
--debugify-quietβ suppress verbose debugify output π€«--denormal-fp-math=<value>β select which denormal numbers the code is permitted to require:=ieeeβ IEEE 754 denormal numbers=preserve-signβ the sign of a flushed-to-zero number is preserved in the sign of 0=positive-zeroβ denormals are flushed to positive zero
--denormal-fp-math-f32=<value>β same deal as above, but forfloat:=ieeeβ IEEE 754 denormal numbers=preserve-signβ the sign of a flushed-to-zero number is preserved in the sign of 0=positive-zeroβ denormals are flushed to positive zero
--disable-i2p-p2i-optβ disables the inttoptr/ptrtoint roundtrip optimization--disable-lazy-compilationβ disable JIT lazy compilation--disable-promote-alloca-to-ldsβ disable promote alloca to LDS--disable-promote-alloca-to-vectorβ disable promote alloca to vector--disable-tail-callsβ never emit tail calls, periodt π«--dlopen=<string>β dynamic libraries to load before linking--do-counter-promotionβ do counter register promotion--dot-cfg-mssa=<file name for generated dot file>β file name for the generated dot file--dwarf-version=<int>β Dwarf version--dwarf64β generate debugging info in the 64-bit DWARF format--emit-call-site-infoβ emit call site debug information, if debug information is enabled.--emit-dwarf-unwind=<value>β whether to emit DWARF EH frame entries:=alwaysβ Always emit EH frame entries=no-compact-unwindβ Only emit EH frame entries when compact unwind is not available=defaultβ Use target platform default
--emscripten-cxx-exceptions-allowed=<string>β the list of function names in which Emscripten-style exception handling is enabled (see the emscriptenEMSCRIPTEN_CATCHING_ALLOWEDoptions)--emulated-tlsβ use the emulated TLS model--enable-approx-func-fp-mathβ enable FP math optimizations that assume approx func--enable-cache-managerβ use the cache manager to save/load modules--enable-cse-in-irtranslatorβ should enable CSE in irtranslator--enable-cse-in-legalizerβ should enable CSE in Legalizer--enable-emscripten-cxx-exceptionsβ WebAssembly Emscripten-style exception handling--enable-emscripten-sjljβ WebAssembly Emscripten-style setjmp/longjmp handling--enable-gvn-hoistβ enable the GVN hoisting pass (default = off)--enable-gvn-memdepβ (no description given, she's keeping it cute and cryptic π )--enable-gvn-sinkβ enable the GVN sinking pass (default = off)--enable-jmc-instrumentβ instrument functions with a call to__CheckForDebuggerJustMyCode--enable-load-in-loop-preβ (no description on the page πΈ)--enable-load-preβ (also no description, iconic minimalism)--enable-loop-simplifycfg-term-foldingβ (no description, just vibes β¨)--enable-name-compressionβ enable name/filename string compression--enable-no-infs-fp-mathβ enable FP math optimizations that assume no+-Infs--enable-no-nans-fp-mathβ enable FP math optimizations that assume no NaNs
okay bestie that's not even all of it β more options are literally coming, keep scrolling π
--enable-no-signed-zeros-fp-mathβ turns on FP math optimizations that assume the sign of0is insignificant. She's assuming, bestie. β¨--enable-no-trapping-fp-mathβ enables setting the FP exceptions build attribute not to use exceptions.--enable-split-backedge-in-load-preβ the original leaves this one blank, so I'm not inventing tea. π--enable-unsafe-fp-mathβ enables optimizations that may decrease FP precision. You've been warned, babes.--entry-function=<function>β specify the entry function (default ='main') of the executable.--exception-model=<value>β exception model. Pick your fighter:=defaultβ default exception handling model=dwarfβ DWARF-like CFI based exception handling=sjljβ SjLj exception handling=armβ ARM EHABI exceptions=winehβ Windows exception model=wasmβ WebAssembly exception handling
--experimental-debug-variable-locationsβ use experimental new value-tracking variable locations. Experimental, so it's giving beta energy. π§ͺ--extra-archive=<input archive>β extra archive files to be loaded.--extra-module=<input bitcode>β extra modules to be loaded.--extra-object=<input object>β extra object files to be loaded.--fake-argv0=<executable>β override the'argv[0]'value passed into the executing program.--fatal-warningsβ treat warnings as errors. Periodt. π--filetype=<value>β choose a file type (not all types are supported by all targets):=asmβ emit an assembly (.s) file=objβ emit a native object (.o) file=nullβ emit nothing, for performance testing
--float-abi=<value>β choose float ABI type:=defaultβ target default float ABI type=softβ soft float ABI (implied by-soft-float)=hardβ hard float ABI (uses FP registers)
--force-dwarf-frame-sectionβ always emit a debug frame section.--force-interpreterβ force interpretation: disable JIT.--fp-contract=<value>β enable aggressive formation of fused FP ops:=fastβ fuse FP ops whenever profitable=onβ only fuse'blessed'FP ops.=offβ only fuse FP ops when the result won't be affected.
--frame-pointer=<value>β specify frame pointer elimination optimization:=allβ disable frame pointer elimination=non-leafβ disable frame pointer elimination for non-leaf frame=noneβ enable frame pointer elimination
--fs-profile-debug-bw-threshold=<uint>β only show debug message if the source branch weight is greater than this value.--fs-profile-debug-prob-diff-threshold=<uint>β only show debug message if the branch probility is greater than this value (in percentage). (Keeping the original spelling, bestie π)--function-sectionsβ emit functions into separate sections.--generate-merged-base-profilesβ when generating nested context-sensitive profiles, always generate extra base profile for function with all its context profiles merged into it.--gpsize=<uint>β Global Pointer Addressing Size. The default size is8.--hash-based-counter-splitβ rename counter variable of a comdat function based on cfg hash.--hot-cold-splitβ enable hot-cold splitting pass.--ignore-xcoff-visibilityβ not emit the visibility attribute for asm in AIX OS or give all symbols'unspecified'visibility in XCOFF object file.--import-all-indexβ import all external functions in index.--incremental-linker-compatibleβ when used withfiletype=obj, emit an object file which can be used with an incremental linker.--instcombine-code-sinkingβ enable code sinking.--instcombine-guard-widening-window=<uint>β how wide an instruction window to bypass looking for another guard.--instcombine-max-iterations=<uint>β limit the maximum number of instruction combining iterations.--instcombine-max-num-phis=<uint>β maximum number phis to handle in intptr/ptrint folding.--instcombine-max-sink-users=<uint>β maximum number of undroppable users for instruction sinking.--instcombine-maxarray-size=<uint>β maximum array size considered when doing a combine.--instcombine-negator-enabledβ should we attempt to sink negations? (Yes, bestie, yes.)--instcombine-negator-max-depth=<uint>β what is the maximal lookup depth when trying to check for viability of negation sinking.--instrprof-atomic-counter-update-allβ make all profile counter updates atomic (for testing only).--internalize-public-api-file=<filename>β a file containing list of symbol names to preserve.--internalize-public-api-list=<list>β a list of symbol names to preserve.--iterative-counter-promotionβ allow counter promotion across the whole loop nest.--jd=<string>β specifies the JITDylib to be used for any subsequent-extra-modulearguments.--jit-kind=<value>β choose underlying JIT kind:=mcjitβ MCJIT=orcβ Orc JIT=orc-lazyβ Orc-based lazy JIT.
--jit-linker=<value>β choose the dynamic linker/loader:=defaultβ default for platform and JIT-kind=rtdyldβ RuntimeDyld=jitlinkβ Orc-specific linker
--load=<pluginfilename>β load the specified plugin.--lower-global-dtors-via-cxa-atexitβ lowerllvm.global_dtors(global destructors) via__cxa_atexit.--lto-aix-system-assembler=<path>β path to a system assembler, picked up on AIX only.--lto-embed-bitcode=<value>β embed LLVM bitcode in object files produced by LTO:=noneβ do not embed=optimizedβ embed after all optimization passes=post-merge-pre-optβ embed post merge, but before optimizations
--lto-pass-remarks-filter=<regex>β only record optimization remarks from passes whose names match the given regular expression.--lto-pass-remarks-format=<format>β the format used for serializing remarks (default:YAML).--lto-pass-remarks-output=<filename>β output filename for pass remarks.--march=<string>β architecture to generate code for (see--version).--matrix-default-layout=<value>β sets the default matrix layout:=column-majorβ use column-major layout=row-majorβ use row-major layout
--matrix-print-after-transpose-optβ the original just leaves this blank, so no extra lore from me π--mattr=<a1,+a2,-a3,...>β target specific attributes (-mattr=helpfor details).--max-counter-promotions=<int>β max number of allowed counter promotions.--max-counter-promotions-per-loop=<uint>β max number counter promotions per loop to avoid increasing register pressure too much.--mc-relax-allβ when used withfiletype=obj, relax all fixups in the emitted object file.--mcabacβtbd. (That's literally what it says, bestie π)--mcjit-remote-process=<filename>β specify the filename of the process to launch for remote MCJIT execution. If none is specified, remote execution will be simulated in-process.--mcpu=<cpu-name>β target a specific cpu type (-mcpu=helpfor details).--meabi=<value>β set EABI type (default depends on triple):=defaultβ triple default EABI version=4β EABI version 4=5β EABI version 5=gnuβ EABI GNU
--merror-missing-parenthesisβ error for missing parenthesis around predicate registers.--merror-noncontigious-registerβ error for register names that aren't contigious. (Spelling kept exactly as the manpage gave it π)--mhvxβ enable Hexagon Vector eXtensions.--mhvx=<value>β enable Hexagon Vector eXtensions:=v60β build for HVX v60=v62β build for HVX v62=v65β build for HVX v65=v66β build for HVX v66=v67β build for HVX v67=v68β build for HVX v68=v69β build for HVX v69=v71β build for HVX v71=v73β build for HVX v73
--mips-compact-branches=<value>β MIPS Specific: Compact branch policy.
(okay so we're still in the middle of the option buffet, and this first little trio is the tail end of the compact-branches option from before β carry on π«Ά)
=neverβ bestie, do not use compact branches if you can possibly help it.=optimalβ use compact branches where it actually makes sense (this is the default, btw π ).=alwaysβ always use compact branches whenever possible, no thoughts, head empty.
--mips16-constant-islandsβ turn on mips16 constant islands β¨--mips16-hard-floatβ turn on mips16 hard float.--mir-strip-debugify-onlyβ shouldmir-strip-debugonly strip debug info from debugified modules by default? π--misexpect-tolerance=<uint>β stops diagnostics from being emitted when profile counts are within N% of the threshold.--mno-compoundβ for Hexagon: stop looking for compound instructions.--mno-fixupβ for Hexagon: stop fixing up resolved relocations.--mno-ldc1-sdc1β expand double precision loads and stores into their single precision counterparts π--mno-pairingβ for Hexagon: stop looking for duplex instructions.--mtriple=<string>β override the target triple for the module. main character energy for your build config.--mwarn-missing-parenthesisβ warn when there's a missing parenthesis around predicate registers.--mwarn-noncontigious-registerβ warn when register names aren't contiguous.--mwarn-sign-mismatchβ warn when a signed value and an unsigned value don't match up π--no-deprecated-warnβ suppress all deprecated warnings.--no-discriminatorsβ stop generating discriminator information.--no-process-symsβ don't resolvelliprocess symbols inside JIT'd code.--no-type-checkβ suppress type errors (this one's for Wasm).--no-warnβ suppress all warnings. silence, iconic, periodt.--no-xray-indexβ don't emit thexray_fn_idxsection.--nozero-initialized-in-bssβ don't put zero-initialized symbols into the bss section.--nvptx-sched4regβ NVPTX specific: schedule for register pressure.--object-cache-dir=<string>β the directory where cached object files live (and it must be user writable, okay?).--opaque-pointersβ use opaque pointers β¨--orc-runtime=<string>β use the ORC runtime from the path you give it.--per-module-lazyβ lazy compilation across whole module boundaries instead of individual functions.--poison-checking-function-localβ check that returns are non-poison (this one's for testing π§ͺ).--print-pipeline-passesβ print a-passescompatible string describing the pipeline (best-effort only, so don't @ me).--r600-ir-structurizeβ use theStructurizeCFGIR pass.--rdf-dumpβ no description in the source, bestie, it simply exists π--rdf-limit=<uint>β also no description. mystery behaviour, we love that for it π--relax-elf-relocationsβ emitGOTPCRELX/REX_GOTPCRELXinstead ofGOTPCRELon x86-64 ELF.--relocation-model=<value>β pick your relocation model π=staticβ non-relocatable code.=picβ fully relocatable, position independent code.=dynamic-no-picβ relocatable external references, non-relocatable code.=ropiβ code and read-only data relocatable, accessed PC-relative.=rwpiβ read-write data relocatable, accessed relative to static base.=ropi-rwpiβ the combo meal:ropiplusrwpiπ
--remote-mcjitβ execute MCJIT'ed code in a separate process.--runtime-counter-relocationβ enable relocating counters at runtime.--safepoint-ir-verifier-print-onlyβ no description given, it's giving enigma π--sample-profile-check-record-coverage=<N>β emit a warning if less than N% of the records in the input profile actually get matched to the IR.--sample-profile-check-sample-coverage=<N>β emit a warning if less than N% of the samples in the input profile actually get matched to the IR.--sample-profile-max-propagate-iterations=<uint>β the max number of iterations to go through when propagating sample block/edge weights through the CFG.--skip-ret-exit-blockβ suppress counter promotion when exit blocks containret.--soft-floatβ generate software floating point library calls.--speculative-counter-promotion-max-exiting=<uint>β the max number of exiting blocks of a loop that's allowed to get speculative counter promotion.--speculative-counter-promotion-to-loopβ when this option is false, and the target block is in a loop, the promotion gets disallowed unless the promoted counter update can be further/iteratively promoted into an acyclic region.--split-machine-functionsβ split cold basic blocks out of machine functions, based on profile information.--stack-size-sectionβ emit a section containing stack size metadata.--stack-symbol-orderingβ order local stack symbols.--stackrealignβ force the stack to align to the minimum alignment.--strict-dwarfβ use strict dwarf.--summary-file=<string>β the summary file to use for function importing.--sve-tail-folding=<string>β control the use of vectorisation using tail-folding for SVE π¦disabledβ no loop types will vectorize using tail-folding.defaultβ uses the default tail-folding settings for the target CPU.allβ all legal loop types will vectorize using tail-folding.simpleβ use tail-folding for simple loops (not reductions or recurrences).reductionsβ use tail-folding for loops containing reductions.recurrencesβ use tail-folding for loops containing fixed order recurrences.
--swift-async-fp=<value>β decide when the Swift async frame pointer gets set.=autoβ decide based on the deployment target.=alwaysβ always set the bit.=neverβ never set the bit.
--tail-predication=<value>β the MVE tail-predication pass options π=disabledβ don't tail-predicate loops.=enabled-no-reductionsβ enable tail-predication, but not for reduction loops.=enabledβ enable tail-predication, including reduction loops.=force-enabled-no-reductionsβ enable tail-predication, but not for reduction loops, and force it β which might be unsafe.=force-enabledβ enable tail-predication, including reduction loops, and force it β which might be unsafe.
--tailcalloptβ turnfastcccalls into tail calls by (potentially) changing the ABI. yes, the ABI. buckle up.--thinlto-assume-mergedβ assume the input has already been through ThinLTO function importing and the other pre-optimization pipeline changes.--thread-entry=<string>β calls the given entry-point on a new thread (only whenjit-kind=orc-lazy).--thread-model=<value>β choose your threading model π=posixβ POSIX thread model.=singleβ single thread model.
--threads=<int>β no description, just vibes π--tls-size=<uint>β the bit size of immediate TLS offsets.--type-based-intrinsic-costβ calculate intrinsics cost based only on argument types.--unique-basic-block-section-namesβ give every single basic block section a unique name β¨--unique-section-namesβ give every single section a unique name β¨--use-ctorsβ use.ctorsinstead of.init_array.--vec-extabiβ enable the AIX Extended Altivec ABI.--verify-region-infoβ verify region info (heads up: this one is time consuming).--vp-counters-per-site=<number>β the average number of profile counters allocated per value profiling site.--vp-static-allocβ do static counter allocation for the value profiler.--wasm-enable-ehβ WebAssembly exception handling.--wasm-enable-sjljβ WebAssemblysetjmp/longjmphandling.--x86-align-branch=<string>β ok so this one is all about telling the assembler which branches to align. You pass in a plus separated list of types, and here's what each type means:jccβ indicates conditional jumpsfusedβ indicates fused conditional jumpsjmpβ indicates direct unconditional jumpscallβ indicates direct and indirect callsretβ indicates retsindirectβ indicates indirect unconditional jumps
--x86-align-branch-boundary=<uint>β Control how the assembler should align branches with NOP. If the boundary's size isn't 0, it has to be a power of 2 and no less than 32. Branches get aligned to stop them from being across or against the boundary of that specified size. The default value 0 means no branch alignment at all.--x86-branches-within-32B-boundariesβ Align selected instructions to mitigate the negative performance impact of Intel's micro code update for errata skx102.
Heads up bestie: this may break assumptions about labels corresponding to particular instructions, and should be used with caution.
--x86-pad-max-prefix-size=<uint>β Maximum number of prefixes to use for padding. That's it, that's the whole vibe.--xcoff-traceback-tableβ Emit the XCOFF traceback table. Slay.
Generic Options
--helpβ Display available options (and--help-hiddenfor more).--help-listβ Display list of available options (and--help-list-hiddenfor more).--versionβ Display the version of this program.
Polly Options
Configure the polly loop optimizer.
--pollyβ Enable the polly optimizer (with-O1,-O2or-O3).--polly-2nd-level-tilingβ Enable a 2nd level loop of loop tiling.--polly-ast-print-accessesβ Print memory access functions.--polly-context=<isl parameter set>β Provide additional constraints on the context parameters.--polly-dce-precise-steps=<int>β The number of precise steps between two approximating iterations. (A value of-1schedules another approximation stage before the actual dead code elimination.--polly-delicm-max-ops=<int>β Maximum number of isl operations to invest for lifetime analysis;0=no limit.--polly-detect-full-functionsβ Allow the detection of full functions.--polly-dump-afterβ Dump module after Polly transformations into a file suffixed with"-after".--polly-dump-after-file=<string>β Dump module after Polly transformations to the given file.--polly-dump-beforeβ Dump module before Polly transformations into a file suffixed with"-before".--polly-dump-before-file=<string>β Dump module before Polly transformations to the given file.--polly-enable-simplifyβ Simplify SCoP after optimizations.--polly-ignore-func=<string>β Ignore functions that match a regex. Multiple regexes can be comma separated. Scop detection will ignore all functions that match ANY of the regexes provided.--polly-isl-arg=<argument>β Option passed to ISL.--polly-matmul-optβ Perform optimizations of matrix multiplications based on pattern matching.--polly-on-isl-error-abortβ Abort if an isl error is encountered.--polly-only-func=<string>β Only run on functions that match a regex. Multiple regexes can be comma separated. Scop detection will run on all functions that match ANY of the regexes provided.--polly-only-region=<identifier>β Only run on certain regions (The provided identifier must appear in the name of the region's entry block--polly-only-scop-detectionβ Only run scop detection, but no other optimizations.--polly-optimized-scopsβ Polly - Dump polyhedral description of Scops optimized with the isl scheduling optimizer and the set of post-scheduling transformations is applied on the schedule tree.--polly-parallelβ Generate thread parallel code (isl codegen only).--polly-parallel-forceβ Force generation of thread parallel code ignoring any cost model.--polly-pattern-matching-based-optsβ Perform optimizations based on pattern matching.--polly-postoptsβ Apply post-rescheduling optimizations such as tiling (requires-polly-reschedule).--polly-pragma-based-optsβ Apply user-directed transformation from metadata.--polly-pragma-ignore-depcheckβ Skip the dependency check for pragma-based transformations.--polly-process-unprofitableβ Process scops that are unlikely to benefit from Polly optimizations.--polly-register-tilingβ Enable register tiling.--polly-reportβ Print information about the activities of Polly.--polly-rescheduleβ Optimize SCoPs using ISL.--polly-showβ Highlight the code regions that will be optimized in a (CFG BBs and LLVM-IR instructions).--polly-show-onlyβ Highlight the code regions that will be optimized in a (CFG only BBs).--polly-stmt-granularity=<value>β Algorithm to use for splitting basic blocks into multiple statements.=bbβ One statement per basic block=scalar-indepβ Scalar independence heuristic=storeβ Store-level granularity
--polly-tc-optβ Perform optimizations of tensor contractions based on pattern matching.--polly-tilingβ Enable loop tiling.--polly-vectorizer=<value>β Select the vectorization strategy.=noneβ No Vectorization=pollyβ Polly internal vectorizer=stripmineβ Strip-mine outer loops for the loop-vectorizer to trigger
That's a wrap bestie! This whole page is from lli 16, dated April 2024. Mwah πβ¨
π¦ where this page comes from
- ubuntu noble: llvm-16-runtime 1:16.0.6-23ubuntu4 Β· APACHE-2-LLVM-EXCEPTIONS
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash on : a language model's rewrite of the original, under its terms