CXL-INJECT-PROTOCOL-ERROR(1)

πŸ“¦
version 85 Β· 4 versions
, in arch rolling

🩺 CXL-INJECT-PROTOCOL-ERROR β€” bestie edition πŸ’…

okay so this is the cxl-inject-protocol-error page, from the cxl manual, and it's literally about yeeting CXL protocol errors into CXL downstream ports 🎯 yes, on purpose. sit down, hydrate, let's go ✨


✨ NAME ✨

cxl-inject-protocol-error β€” inject CXL protocol errors into CXL downstream ports 🫢


🌸 SYNOPSIS 🌸

cxl inject-protocol-error <dport> [<options>]

πŸ¦‹ DESCRIPTION πŸ¦‹

⚠️ Warning ⚠️ Error injection can cause system instability and should only be used for debugging hardware and software error recovery flows. Use at your own risk! πŸ’€

So what this does: it injects a CXL protocol error into a CXL downstream port (a dport). Not me being dramatic β€” downstream ports that support error injection will have their protocol_injectable attribute in cxl-list set to true. That's your vibe check right there πŸ‘‘

The -p/--protocol and -s/--severity options are required for error injection. no cap, you can't skip them. Here's the deal:

  • -p picks which CXL protocol to inject an error on β€” either "mem" (CXL.mem) or "cache" (CXL.cache).
  • -s picks the severity of the error, and it can be one of: "correctable", "uncorrectable", or "fatal".

The types of errors (and severities) available depends on the platform β€” it's giving "everybody's different and that's beautiful" 🌈. To find the available error types for injection, look at the injectable_protocol_errors attribute under the applicable CXL bus object in the output of cxl-list. For example:

# cxl list -B
[
  {
        "bus":"root0",
        "provider":"ACPI.CXL",
        "injectable_protocol_errors":[
          "mem-correctable",
          "mem-fatal",
        ]
  }
]

The dport you're injecting into is specified by host name (e.g. "0000:0e:01.1"). Here's an example injection using the example bus listing above πŸŽ€:

# cxl list -TP
 [
  {
    "port":"port1",
    "host":"pci0000:e0",
    "depth":1,
    "decoders_committed":1,
    "nr_dports":1,
    "dports":[
      {
        "dport":"0000:e0:01.1",
        "alias":"device:02",
        "id":0,
        "protocol_injectable":true
      }
    ]
  }
]

# cxl inject-protocol-error "0000:e0:01.1" -p mem -s correctable
cxl inject-protocol-error: inject_proto_err: injected mem-correctable protocol error.

iconic. it literally tells you it worked πŸ˜­πŸ’–

CXL protocol (CXL.cache/mem) error injection requires the platform to support ACPI v6.5+ error injection (EINJ). and that's not all β€” in addition to platform support, the CONFIG_ACPI_APEI_EINJ and CONFIG_ACPI_APEI_EINJ_CXL kernel configuration options must be enabled. so like, both of them, fr fr. for more information, view the Linux kernel documentation on EINJ πŸ“š

This command depends on the CXL debug filesystem (normally mounted at "/sys/kernel/debug/cxl") to inject protocol errors. and if the CXL debugfs is not accessible? then the protocol_injectable attribute of dports will always be set to false, and the injectable_protocol_errors attribute of CXL busses will always be empty 🫠 so if everything looks dead, check your mount first, bestie.


πŸ’… OPTIONS πŸ’…

  • -p, --protocol β€” which CXL protocol to inject an error on. Can be either "mem" (CXL.mem) or "cache" (CXL.cache). 🧚
  • -s, --severity β€” severity level of error to be injected. Can be one of the following: "correctable", "uncorrectable", or "fatal". πŸ”₯
  • --debug β€” enable debug output. because sometimes you gotta see the receipts πŸ‘€

🌟 SEE ALSO 🌟


and that's the whole page, no crumbs left behind πŸ“πŸ’œ β€” this cutie came from cxl, version dated 2026-06-30, and honestly? she ate. periodt. πŸ‘‘βœ¨

πŸ“¦ where this page comes from
  • arch rolling: ndctl 85-1 Β· LGPL-2.1-only AND GPL-2.0-only AND CC0-1.0 AND MIT
  • πŸ’– girlified by deepseek-ai/DeepSeek-V4.1-Flash-1017 on : a language model's rewrite of the original, under its terms