CLANG-REPL(1)
β¨ CLANG-REPL(1) β User Commands β¨
π NAME π
clang-repl β manual page for clang-repl 18. That's the whole NAME section, bestie. Short, sweet, iconic. π«Ά
πΈ DESCRIPTION πΈ
USAGE:
clang-repl [options] [code to run]
π OPTIONS π
Okay so here come the options. There are a LOT of them. We are not skipping a single one, periodt. π
π Color Options π
--colorβ Use colors in output (default=autodetect). Auto-detect glam, lowkey iconic. β¨
β¨ General options β¨
--Xcc=<string>β Argument to pass to theCompilerInvocation. Like a little note you slip to the compiler.--aarch64-neon-syntax=<value>β Choose style of NEON code to emit from AArch64 backend:=genericβ Emit generic NEON assembly=appleβ Emit Apple-style NEON assembly
--aarch64-use-aaβ Enable the use of AA during codegen. AA said yes, bestie.--abort-on-max-devirt-iterations-reachedβ Abort when the max iterations for devirtualization CGSCC repeat pass is reached--allow-ginsert-as-artifactβ AllowG_INSERTto be considered an artifact. Hack around AMDGPU test infinite loops.--amdgpu-atomic-optimizer-strategy=<value>β Select DPP or Iterative strategy for scan=DPPβ Use DPP operations for scan=Iterativeβ Use Iterative approach for scan=Noneβ Disable atomic optimizer
--amdgpu-bypass-slow-divβ Skip 64-bit divide for dynamic 32-bit values--amdgpu-disable-loop-alignmentβ Do not align and prefetch loops--amdgpu-dpp-combineβ Enable DPP combiner--amdgpu-dump-hsa-metadataβ Dump AMDGPU HSA Metadata--amdgpu-enable-merge-m0β Merge and hoist M0 initializations--amdgpu-enable-power-schedβ Enable scheduling to minimize mAI power bursts--amdgpu-kernarg-preload-count=<uint>β How many kernel arguments to preload onto SGPRs--amdgpu-promote-alloca-to-vector-limit=<uint>β Maximum byte size to consider promote alloca to vector--amdgpu-sdwa-peepholeβ Enable SDWA peepholer--amdgpu-use-aa-in-codegenβ Enable the use of AA during codegen.--amdgpu-verify-hsa-metadataβ Verify AMDGPU HSA Metadata--amdgpu-vgpr-index-modeβ Use GPR indexing mode instead of movrel for vector indexing--arm-add-build-attributesβ (no description in the original, just a lonely dash π« )--arm-implicit-it=<value>β Allow conditional instructions outdside of an IT block=alwaysβ Accept in both ISAs, emit implicit ITs in Thumb=neverβ Warn in ARM, reject in Thumb=armβ Accept in ARM, reject in Thumb=thumbβ Warn in ARM, emit implicit ITs in Thumb
--asm-show-instβ Emit internal instruction representation to assembly file--atomic-counter-update-promotedβ Do counter update using atomic fetch add for promoted counters only--atomic-first-counterβ Use atomic fetch add for first counter in a function (usually the entry counter)--bounds-checking-single-trapβ Use one trap block per function--bounds-checking-unique-trapsβ Always use one trap per check--bpf-stack-size=<int>β Specify the BPF stack size limit--cfg-hide-cold-paths=<number>β Hide blocks with relative frequency below the given value--cfg-hide-deoptimize-pathsβ (no description in the original, just a dash π)--cfg-hide-unreachable-pathsβ (no description in the original, just a dash π)--cost-kind=<value>β Target cost kind=throughputβ Reciprocal throughput=latencyβ Instruction latency=code-sizeβ Code size=size-latencyβ Code size and latency
--cs-profile-generateβ Perform context sensitive PGO instrumentation--cs-profile-path=<string>β Context sensitive profile file path--debug-info-correlateβ Use debug info to correlate profiles. (Deprecated, use-profile-correlate=debug-info)--debugify-func-limit=<ulong>β Set max number of processed functions per pass.--debugify-level=<value>β Kind of debug info to add=locationsβ Locations only=location+variablesβ Locations and Variables
--debugify-quietβ Suppress verbose debugify output--disable-auto-upgrade-debug-infoβ Disable autoupgrade of debug info--disable-i2p-p2i-optβ Disables inttoptr/ptrtoint roundtrip optimization--disable-promote-alloca-to-ldsβ Disable promote alloca to LDS--disable-promote-alloca-to-vectorβ Disable promote alloca to vector--do-counter-promotionβ Do counter register promotion--dot-cfg-mssa=<file name for generated dot file>β file name for generated dot file--dwarf-version=<int>β Dwarf version--dwarf64β Generate debugging info in the 64-bit DWARF format--emit-compact-unwind-non-canonicalβ Whether to try to emit Compact Unwind for non canonical entries.--emit-dwarf-unwind=<value>β Whether to emit DWARF EH frame entries.=alwaysβ Always emit EH frame entries=no-compact-unwindβ Only emit EH frame entries when compact unwind is not available=defaultβ Use target platform default
--emscripten-cxx-exceptions-allowed=<string>β The list of function names in which Emscripten-style exception handling is enabled (see emscriptenEMSCRIPTEN_CATCHING_ALLOWEDoptions)--enable-cse-in-irtranslatorβ Should enable CSE in irtranslator--enable-cse-in-legalizerβ Should enable CSE in Legalizer--enable-emscripten-cxx-exceptionsβ WebAssembly Emscripten-style exception handling--enable-emscripten-sjljβ WebAssembly Emscripten-style setjmp/longjmp handling--enable-gvn-hoistβ Enable the GVN hoisting pass (default = off)--enable-gvn-memdepβ (no description in the original, just a dash π)--enable-gvn-sinkβ Enable the GVN sinking pass (default = off)--enable-load-in-loop-preβ (no description in the original, just a dash π)--enable-load-preβ (no description in the original, just a dash π)--enable-loop-simplifycfg-term-foldingβ (no description in the original, just a dash π)--enable-name-compressionβ Enable name/filename string compression--enable-split-backedge-in-load-preβ (no description in the original, just a dash π)--enable-split-loopiv-heuristicβ Enable loop iv regalloc heuristic--execute-concurrency=<uint>β The number of threads used to process all files in parallel. Set to 0 for hardware concurrency. This flag only applies to all-TUs.--executor=<string>β The name of the executor to use.--experimental-debug-variable-locationsβ Use experimental new value-tracking variable locations--experimental-debuginfo-iteratorsβ Enable communicating debuginfo positions through iterators, eliminating intrinsics--fatal-warningsβ Treat warnings as errors--filter=<string>β Only process files that match this filter. This flag only applies to all-TUs.--force-tail-folding-style=<value>β Force the tail folding style=noneβ Disable tail folding=dataβ Create lane mask for data only, usingactive.lane.maskintrinsic=data-without-lane-maskβ Create lane mask with compare/stepvector=data-and-controlβ Create lane mask usingactive.lane.maskintrinsic, and use it for both data and control flow=data-and-control-without-rt-checkβ Similar to data-and-control, but remove the runtime check
--fs-profile-debug-bw-threshold=<uint>β Only show debug message if the source branch weight is greater than this value.--fs-profile-debug-prob-diff-threshold=<uint>β Only show debug message if the branch probility is greater than this value (in percentage).--generate-merged-base-profilesβ When generating nested context-sensitive profiles, always generate extra base profile for function with all its context profiles merged into it.--gpsize=<uint>β Global Pointer Addressing Size. The default size is 8.--hash-based-counter-splitβ Rename counter variable of a comdat function based on cfg hash--hexagon-rdf-limit=<uint>β (no description in the original, just a dash π)--hot-cold-splitβ Enable hot-cold splitting pass--import-all-indexβ Import all external functions in index.--incremental-linker-compatibleβ When used withfiletype=obj, emit an object file which can be used with an incremental linker--instcombine-code-sinkingβ Enable code sinking--instcombine-guard-widening-window=<uint>β How wide an instruction window to bypass looking for another guard--instcombine-max-num-phis=<uint>β the ceiling on how many phis get handled when it's doing that intptr/ptrint folding. that's the cap, no cap. π--instcombine-max-sink-users=<uint>β max number of undroppable users for instruction sinking. like, if too many things refuse to let go, sinking just doesn't happen.--instcombine-maxarray-size=<uint>β biggest array size that even gets considered when doing a combine.--instcombine-negator-enabledβ should we even try to sink negations? yes/no vibes.--instcombine-negator-max-depth=<uint>β the maximal lookup depth when it's checking whether negation sinking is actually viable. it's giving "how deep do you wanna go".--instrprof-atomic-counter-update-allβ make all profile counter updates atomic. heads up bestie: for testing only, don't ship it. π--internalize-public-api-file=<filename>β a file containing a list of symbol names to preserve. bestie energy: protect these.--internalize-public-api-list=<list>β the same thing but you just hand it the list of symbol names to preserve directly.--iterative-counter-promotionβ allows counter promotion across the whole loop nest. going big.--lto-aix-system-assembler=<path>β path to a system assembler. picked up on AIX only, so if you're not on AIX it's not your moment.--lto-embed-bitcode=<value>β embed LLVM bitcode in object files produced by LTO. pick your flavor:=noneβ do not embed. nothing. zero. π«=optimizedβ embed after all optimization passes have run.=post-merge-pre-optβ embed post merge, but before optimizations.
--lto-pass-remarks-filter=<regex>β only record optimization remarks from passes whose names match the given regular expression. regex girlies rise. β¨--lto-pass-remarks-format=<format>β the format used for serializing remarks (default: YAML).--lto-pass-remarks-output=<filename>β output filename for pass remarks. where the tea gets written. π--matrix-default-layout=<value>β sets the default matrix layout:=column-majorβ use column-major layout.=row-majorβ use row-major layout.
--matrix-print-after-transpose-optβ literally no description in the source, it's giving mystery. π--max-counter-promotions=<int>β max number of allowed counter promotions.--max-counter-promotions-per-loop=<uint>β max number of counter promotions per loop, so we don't crank register pressure too much. it's called boundaries. π--mc-relax-allβ when used withfiletype=obj, relax all fixups in the emitted object file.--mcabacβtbd. that's it. that's the description. π--merror-missing-parenthesisβ error out for a missing parenthesis around predicate registers. grammar police but make it compiler.--merror-noncontigious-registerβ error for register names that aren't contigious. (yes, it's spelled that way in the source, bestie, we don't fix it. π)--mhvxβ enable Hexagon Vector eXtensions.--mhvx=<value>β enable Hexagon Vector eXtensions, but tell it which build:=v60β build for HVX v60=v62β build for HVX v62=v65β build for HVX v65=v66β build for HVX v66=v67β build for HVX v67=v68β build for HVX v68=v69β build for HVX v69=v71β build for HVX v71=v73β build for HVX v73
--mips-compact-branches=<value>β MIPS Specific: Compact branch policy. options on options:=neverβ do not use compact branches if possible.=optimalβ use compact branches where appropriate (default).=alwaysβ always use compact branches if possible. all or nothing fr fr.
--mips16-constant-islandsβ enable mips16 constant islands.--mips16-hard-floatβ enable mips16 hard float.--mir-strip-debugify-onlyβ shouldmir-strip-debugonly strip debug info from debugified modules by default? that's the question.--misexpect-tolerance=<uint>β prevents emiting diagnostics when profile counts are within N% of the threshold.. (yes, "emiting" and the double period are in the original β iconic typo behavior, we keep it verbatim. β¨)--mno-compoundβ disable looking for compound instructions for Hexagon.--mno-fixupβ disable fixing up resolved relocations for Hexagon.--mno-ldc1-sdc1β expand double precision loads and stores to their single precision counterparts.--mno-pairingβ disable looking for duplex instructions for Hexagon.--mwarn-missing-parenthesisβ warn for missing parenthesis around predicate registers. softer than the error version, still judging you gently. π«Ά--mwarn-noncontigious-registerβ warn for register names that arent contigious. (again, spelling straight from the source, don't come for me.)--mwarn-sign-mismatchβ warn for mismatching a signed and unsigned value.--no-deprecated-warnβ suppress all deprecated warnings. not me silencing the past. π--no-discriminatorsβ disable generation of discriminator information.--no-type-checkβ suppress type errors (Wasm).--no-warnβ suppress all warnings. living dangerously, but slay.--nvptx-sched4regβ NVPTX Specific: schedule for register pressue. (spelled exactly like that in the source, "pressue" and all. π )--object-size-offset-visitor-max-visit-instructions=<uint>β maximum number of instructions forObjectSizeOffsetVisitorto look at.--pgo-block-coverageβ use this option to enable basic block coverage instrumentation.--pgo-temporal-instrumentationβ use this option to enable temporal instrumentation.--pgo-view-block-coverage-graphβ create a dot file of CFGs with block coverage inference information. visual girlies, this one's for you. πΈ--poison-checking-function-localβ check that returns are non-poison (for testing).--print-pipeline-passesβ print a-passescompatible string describing the pipeline (best-effort only). ngl, best-effort is the whole mood.--profile-correlate=<value>β use debug info or a binary file to correlate profiles:=<empty>β no profile correlation=debug-infoβ use debug info to correlate=binaryβ use binary to correlate
--r600-ir-structurizeβ useStructurizeCFGIR pass.--relink-builtin-bitcode-postopβ re-link builtin bitcodes after optimization.--riscv-add-build-attributesβ no description, just vibes. π¦--riscv-use-aaβ enable the use of AA during codegen.--runtime-counter-relocationβ enable relocating counters at runtime.--safepoint-ir-verifier-print-onlyβ also no description. mysterious icon. β¨--sample-profile-check-record-coverage=<N>β emit a warning if less than N% of records in the input profile are matched to the IR.--sample-profile-check-sample-coverage=<N>β emit a warning if less than N% of samples in the input profile are matched to the IR.--sample-profile-max-propagate-iterations=<uint>β maximum number of iterations to go through when propagating sample block/edge weights through the CFG.--sanitizer-early-opt-epβ insert sanitizers onOptimizerEarlyEP.--skip-ret-exit-blockβ suppress counter promotion if exit blocks containret.--speculative-counter-promotion-max-exiting=<uint>β the max number of exiting blocks of a loop to allow speculative counter promotion.--speculative-counter-promotion-to-loopβ when the option is false, if the target block is in a loop, the promotion will be disallowed unless the promoted counter update can be further/iteratively promoted into an acyclic region.--summary-file=<string>β the summary file to use for function importing.--sve-tail-folding=<string>β control the use of vectorisation using tail-folding for SVE, where the option is specified in the form(Initial)[+(Flag1|Flag2|...)]:disabledβ (Initial) no loop types will vectorize using tail-foldingdefaultβ (Initial) uses the default tail-folding settings for the target CPUallβ (Initial) all legal loop types will vectorize using tail-foldingsimpleβ (Initial) use tail-folding for simple loops (not reductions or recurrences)reductionsβ use tail-folding for loops containing reductionsnoreductionsβ inverse of aboverecurrencesβ use tail-folding for loops containing fixed order recurrencesnorecurrencesβ inverse of abovereverseβ use tail-folding for loops requiring reversed predicatesnoreverseβ inverse of above
--tail-predication=<value>β MVE tail-predication pass options:=disabledβ don't tail-predicate loops=enabled-no-reductionsβ enable tail-predication, but not for reduction loops=enabledβ enable tail-predication, including reduction loops=force-enabled-no-reductionsβ enable tail-predication, but not for reduction loops, and force this which might be unsafe=force-enabledβ enable tail-predication, including reduction loops, and force this which might be unsafe
--thinlto-assume-mergedβ assume the input has already undergone ThinLTO function importing and the other pre-optimization pipeline changes.--threads=<int>β no description given. it's giving silent main character. π--type-based-intrinsic-costβ calculate intrinsics cost based only on argument types.--ubsan-unique-trapsβ deoptimize traps for UBSAN so there is 1 trap per check.--verify-region-infoβ verify region info (time consuming). she takes her time and that's okay. π§
β¦okay and the flag parade continues, no skips, no gaps, we're getting through every single one π
--vp-counters-per-site=<number>β how many profile counters get allocated, on average, per value profiling site. (average, bestie, not a hard cap)--vp-static-allocβ do static counter allocation for the value profiler--wasm-enable-ehβ WebAssembly exception handling β¨--wasm-enable-sjljβ WebAssemblysetjmp/longjmphandling π¦--x86-align-branch=<string>β tell it which types of branches to align (it's a plus-separated list of types):jccβ indicates conditional jumpsfusedβ indicates fused conditional jumpsjmpβ indicates direct unconditional jumpscallβ indicates direct and indirect callsretβ indicates retsindirectβ indicates indirect unconditional jumps
--x86-align-branch-boundary=<uint>β controls how the assembler should align branches using NOP. if the boundary's size isn't0, it has to be a power of 2 and no less than32. branches get aligned so they don't end up across or against the boundary of the size you specified. and the default value,0, does not align branches at all β it's giving leave-me-alone energy--x86-branches-within-32B-boundariesβ aligns selected instructions to soften the negative performance hit from Intel's micro code update for errataskx102.
β οΈ bestie this one can break assumptions about labels corresponding to particular instructions, so use it with caution. like, respectfully, careful.
--x86-pad-max-prefix-size=<uint>β max number of prefixes to use for padding
π Generic Options π
--helpβ display available options (--help-hiddenfor more π)--help-listβ display a list of available options (--help-list-hiddenfor more)--versionβ display the version of this program π
πΈ Polly Options πΈ β configure the polly loop optimizer
--pollyβ enable the polly optimizer (works with-O1,-O2or-O3)--polly-2nd-level-tilingβ enable a 2nd level loop of loop tiling π§--polly-ast-print-accessesβ print memory access functions--polly-context=<isl parameter set>β provide additional constraints on the context parameters--polly-dce-precise-steps=<int>β the number of precise steps between two approximating iterations. (a value of-1schedules another approximation stage before the actual dead code elimination. β yes the original parenthesis is unbalanced, no we're not fixing it, periodt π )--polly-delicm-max-ops=<int>β maximum number of isl operations to invest in lifetime analysis;0= no limit π«Ά--polly-detect-full-functionsβ allow the detection of full functions--polly-dump-afterβ dump the module after Polly transformations into a file suffixed with"-after"--polly-dump-after-file=<string>β dump the module after Polly transformations to the given file--polly-dump-beforeβ dump the module before Polly transformations into a file suffixed with"-before"--polly-dump-before-file=<string>β dump the module before Polly transformations to the given file--polly-enable-simplifyβ simplify SCoP after optimizations--polly-ignore-func=<string>β ignore functions that match a regex. multiple regexes can be comma separated. Scop detection will ignore all functions that match ANY of the regexes you provided π«--polly-isl-arg=<argument>β option passed to ISL--polly-matmul-optβ perform optimizations of matrix multiplications based on pattern matching π₯--polly-on-isl-error-abortβ abort if an isl error is encountered--polly-only-func=<string>β only run on functions that match a regex. multiple regexes can be comma separated. Scop detection will run on all functions that match ANY of the regexes you provided--polly-only-region=<identifier>β only run on certain regions (the identifier you provide must appear in the name of the region's entry block β again, original parenthesis never closes, iconic behavior π)--polly-only-scop-detectionβ only run scop detection, but no other optimizations--polly-optimized-scopsβ Polly β dump the polyhedral description of Scops optimized with the isl scheduling optimizer, and the set of post-scheduling transformations gets applied on the schedule tree--polly-parallelβ generate thread parallel code (isl codegen only)--polly-parallel-forceβ force generation of thread parallel code, ignoring any cost model--polly-pattern-matching-based-optsβ perform optimizations based on pattern matching--polly-postoptsβ apply post-rescheduling optimizations such as tiling (requires-polly-reschedule)--polly-pragma-based-optsβ apply user-directed transformation from metadata--polly-pragma-ignore-depcheckβ skip the dependency check for pragma-based transformations--polly-process-unprofitableβ process scops that are unlikely to benefit from Polly optimizations. (yes there's a period at the end, she said what she said)--polly-register-tilingβ enable register tiling--polly-reportβ print information about the activities of Polly π--polly-rescheduleβ optimize SCoPs using ISL--polly-showβ highlight the code regions that will be optimized in a (CFG BBs and LLVM-IR instructions)--polly-show-onlyβ highlight the code regions that will be optimized in a (CFG only BBs)--polly-stmt-granularity=<value>β the algorithm to use for splitting basic blocks into multiple statements=bbβ one statement per basic block=scalar-indepβ scalar independence heuristic=storeβ store-level granularity
--polly-tc-optβ perform optimizations of tensor contractions based on pattern matching π--polly-tilingβ enable loop tiling--polly-vectorizer=<value>β select the vectorization strategy=noneβ no Vectorization=stripmineβ strip-mine outer loops for the loop-vectorizer to trigger
and that's the whole flag list, you made it to the end bestie πβ¨ this page was clang-repl 18, dated June 2025, and it lives under the name CLANG-REPL(1) π go forth and repl, ily, bye π«Άπ
π¦ where this page comes from
- debian trixie: clang-tools-18 1:18.1.8-18+b1 Β· APACHE-2-LLVM-EXCEPTIONS
- ubuntu questing: clang-tools-18 1:18.1.8-18ubuntu2
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash on : a language model's rewrite of the original, under its terms