CLANG-REPL(1)
πΈ NAME πΈ
clang-repl β bestie, this is the manual page for clang-repl 17 π
β¨ DESCRIPTION β¨
okay so here's the whole vibe. you run it like this:
clang-repl [options] [code to run]
that's the usage, periodt. then there's a whole OPTIONS: section, and it's long β like, it ate and left no crumbs long. we got two little families in there: Color Options and General options. let's get into it π«Ά
π OPTIONS π
π¨ Color Options
--colorβ use colors in your output, so it's giving cute terminal instead of sad monochrome (default=autodetect) π
π οΈ General options
--Xcc=<string>β an argument you wanna pass straight to theCompilerInvocation. yes, it goes to the compiler, no cap--aarch64-neon-syntax=<value>β pick what style of NEON code the AArch64 backend emits:=genericβ emit generic NEON assembly=appleβ emit Apple-style NEON assembly π
--aarch64-use-aaβ turn on the use of AA during codegen.--abort-on-max-devirt-iterations-reachedβ abort when we hit the max iterations for the devirtualization CGSCC repeat pass. dramatic but fair π--allow-ginsert-as-artifactβ letG_INSERTbe considered an artifact. it's literally a hack around AMDGPU test infinite loops, so don't @ me--amdgpu-atomic-optimizer-strategy=<value>β choose DPP or Iterative strategy for scan:=DPPβ use DPP operations for scan=Iterativeβ use the Iterative approach for scan=Noneβ disable the atomic optimizer
--amdgpu-bypass-slow-divβ skip the 64-bit divide for dynamic 32-bit values--amdgpu-disable-loop-alignmentβ don't align and prefetch loops, we're keeping it casual--amdgpu-dpp-combineβ enable the DPP combiner--amdgpu-dump-hsa-metadataβ dump AMDGPU HSA metadata--amdgpu-enable-merge-m0β merge and hoist M0 initializations--amdgpu-enable-power-schedβ enable scheduling to minimize mAI power bursts β‘--amdgpu-promote-alloca-to-vector-limit=<uint>β maximum byte size to even consider promoting alloca to vector--amdgpu-sdwa-peepholeβ enable the SDWA peepholer--amdgpu-use-aa-in-codegenβ enable the use of AA during codegen.--amdgpu-verify-hsa-metadataβ verify AMDGPU HSA metadata--amdgpu-vgpr-index-modeβ use GPR indexing mode instead of movrel for vector indexing--arm-add-build-attributesβ (no description bestie, it's just there, mysterious main character energy π)--arm-implicit-it=<value>β allow conditional instructions outdside of an IT block:=alwaysβ accept in both ISAs, emit implicit ITs in Thumb=neverβ warn in ARM, reject in Thumb=armβ accept in ARM, reject in Thumb=thumbβ warn in ARM, emit implicit ITs in Thumb
--asm-show-instβ emit internal instruction representation to the assembly file--atomic-counter-update-promotedβ do counter update using atomic fetch add for promoted counters only--atomic-first-counterβ use atomic fetch add for the first counter in a function (usually the entry counter)--bounds-checking-single-trapβ use one trap block per function--bpf-stack-size=<int>β specify the BPF stack size limit--cfg-hide-cold-paths=<number>β hide blocks with relative frequency below the given value--cfg-hide-deoptimize-pathsβ (no description, it's just doing its thing β¨)--cfg-hide-unreachable-pathsβ (also no description, mysterious queen)--cost-kind=<value>β target cost kind:=throughputβ reciprocal throughput=latencyβ instruction latency=code-sizeβ code size=size-latencyβ code size and latency
--cs-profile-generateβ perform context sensitive PGO instrumentation--cs-profile-path=<string>β context sensitive profile file path--debug-info-correlateβ use debug info to correlate profiles.--debugify-func-limit=<ulong>β set max number of processed functions per pass.--debugify-level=<value>β kind of debug info to add:=locationsβ locations only=location+variablesβ locations and variables
--debugify-quietβ suppress verbose debugify output π€«--disable-auto-upgrade-debug-infoβ disable autoupgrade of debug info--disable-i2p-p2i-optβ disables inttoptr/ptrtoint roundtrip optimization--disable-promote-alloca-to-ldsβ disable promote alloca to LDS--disable-promote-alloca-to-vectorβ disable promote alloca to vector--do-counter-promotionβ do counter register promotion--dot-cfg-mssa=<file name for generated dot file>β file name for generated dot file--dwarf-version=<int>β Dwarf version--dwarf64β generate debugging info in the 64-bit DWARF format--emit-compact-unwind-non-canonicalβ whether to try to emit Compact Unwind for non canonical entries.--emit-dwarf-unwind=<value>β whether to emit DWARF EH frame entries:=alwaysβ always emit EH frame entries=no-compact-unwindβ only emit EH frame entries when compact unwind is not available=defaultβ use target platform default
--emscripten-cxx-exceptions-allowed=<string>β the list of function names in which Emscripten-style exception handling is enabled (see the emscriptenEMSCRIPTEN_CATCHING_ALLOWEDoptions)--enable-cse-in-irtranslatorβ should enable CSE in irtranslator--enable-cse-in-legalizerβ should enable CSE in Legalizer--enable-emscripten-cxx-exceptionsβ WebAssembly Emscripten-style exception handling--enable-emscripten-sjljβ WebAssembly Emscripten-style setjmp/longjmp handling--enable-gvn-hoistβ enable the GVN hoisting pass (default = off)--enable-gvn-memdepβ (no description, it's lowkey keeping secrets π )--enable-gvn-sinkβ enable the GVN sinking pass (default = off)--enable-load-in-loop-preβ (no description, iconic and unexplained)--enable-load-preβ (no description, still slaying)--enable-loop-simplifycfg-term-foldingβ (no description, we love a mystery π¦)--enable-name-compressionβ enable name/filename string compression--enable-split-backedge-in-load-preβ (no description, it said nothing and left)--execute-concurrency=<uint>β the number of threads used to process all files in parallel. set it to0for hardware concurrency. heads up bestie, this flag only applies to all-TUs.--executor=<string>β the name of the executor to use.--experimental-debug-variable-locationsβ use experimental new value-tracking variable locations--fatal-warningsβ treat warnings as errors. no more soft launches, it's all consequences now π€--filter=<string>β only process files that match this filter. reminder: this flag only applies to all-TUs.--force-tail-folding-style=<value>β force the tail folding style:=noneβ disable tail folding=dataβ create lane mask for data only, using theactive.lane.maskintrinsic=data-without-lane-maskβ create lane mask with compare/stepvector=data-and-controlβ create lane mask using theactive.lane.maskintrinsic, and use it for both data and control flow=data-and-control-without-rt-checkβ similar todata-and-control, but remove the runtime check
--fs-profile-debug-bw-threshold=<uint>β only show debug message if the source branch weight is greater than this value.--fs-profile-debug-prob-diff-threshold=<uint>β only show debug message if the branch probility is greater than this value (in percentage).--generate-merged-base-profilesβ when generating nested context-sensitive profiles, always generate an extra base profile for a function with all its context profiles merged into it.--gpsize=<uint>β Global Pointer Addressing Size. the default size is 8.--hash-based-counter-splitβ rename the counter variable of a comdat function based on cfg hash--hexagon-rdf-limit=<uint>β (no description, it's giving enigma π)--hot-cold-splitβ enable the hot-cold splitting pass--import-all-indexβ import all external functions in index.--incremental-linker-compatibleβ when used withfiletype=obj, emit an object file which can be used with an incremental linker--instcombine-code-sinkingβ enable code sinking--instcombine-guard-widening-window=<uint>β how wide an instruction window to bypass looking for another guard--instcombine-max-num-phis=<uint>β maximum number phis to handle in intptr/ptrint folding--instcombine-max-sink-users=<uint>β maximum number of undroppable users for instruction sinking--instcombine-maxarray-size=<uint>β maximum array size considered when doing a combine--instcombine-negator-enabledβ should we attempt to sink negations?--instcombine-negator-max-depth=<uint>β what is the maximal lookup depth when trying to check for viability of negation sinking.--instrprof-atomic-counter-update-allβ make all profile counter updates atomic (for testing only) π§ͺ--internalize-public-api-file=<filename>β a file containing a list of symbol names to preserve--internalize-public-api-list=<list>β a list of symbol names to preserve--iterative-counter-promotionβ allow counter promotion across the whole loop nest.
okay bestie that's part 1 of 3, don't go anywhere β more options are literally on the way π
--lto-aix-system-assembler=<path>β the path to a system assembler. AIX only, bestie, it literally only picks this up on AIX.--lto-embed-bitcode=<value>β embed LLVM bitcode inside the object files that LTO produces. β¨=noneβ do not embed. simple as that.=optimizedβ embed after all the optimization passes have run.=post-merge-pre-optβ embed post-merge, but before optimizations.
--lto-pass-remarks-filter=<regex>β only record optimization remarks from passes whose names match the given regular expression. picky, and honestly? valid. π--lto-pass-remarks-format=<format>β the format used for serializing remarks (default:YAML).--lto-pass-remarks-output=<filename>β output filename for pass remarks.--matrix-default-layout=<value>β sets the default matrix layout.=column-majorβ use column-major layout.=row-majorβ use row-major layout.
--matrix-print-after-transpose-optβ no description given, it's just out here vibing. π¦--max-counter-promotions=<int>β max number of allowed counter promotions.--max-counter-promotions-per-loop=<uint>β max number of counter promotions per loop, so we don't crank the register pressure too much.--mc-relax-allβ when used withfiletype=obj, relax all fixups in the emitted object file.--mcabacβtbd. that's it. that's the description. iconic honestly. π--merror-missing-parenthesisβ throw an error for missing parenthesis around predicate registers.--merror-noncontigious-registerβ throw an error for register names that aren't contigious. (yes, spelled exactly like that, we don't fix the spelling, that's the bit.)--mhvxβ enable Hexagon Vector eXtensions. π--mhvx=<value>β enable Hexagon Vector eXtensions, but tell it which one:=v60β build for HVX v60.=v62β build for HVX v62.=v65β build for HVX v65.=v66β build for HVX v66.=v67β build for HVX v67.=v68β build for HVX v68.=v69β build for HVX v69.=v71β build for HVX v71.=v73β build for HVX v73.
--mips-compact-branches=<value>β MIPS specific: compact branch policy.=neverβ do not use compact branches if possible.=optimalβ use compact branches where appropriate (default).=alwaysβ always use compact branches if possible.
--mips16-constant-islandsβ enable mips16 constant islands.--mips16-hard-floatβ enable mips16 hard float.--mir-strip-debugify-onlyβ shouldmir-strip-debugonly strip debug info from debugified modules by default.--misexpect-tolerance=<uint>β prevents emitting diagnostics when profile counts are within N% of the threshold.. (two dots, canonically, we respect it π )--mno-compoundβ disable looking for compound instructions for Hexagon.--mno-fixupβ disable fixing up resolved relocations for Hexagon.--mno-ldc1-sdc1β expand double precision loads and stores to their single precision counterparts.--mno-pairingβ disable looking for duplex instructions for Hexagon.--mwarn-missing-parenthesisβ warn for missing parenthesis around predicate registers.--mwarn-noncontigious-registerβ warn for register names that arent contigious.--mwarn-sign-mismatchβ warn for mismatching a signed and unsigned value.--no-deprecated-warnβ suppress all deprecated warnings.--no-discriminatorsβ disable generation of discriminator information.--no-type-checkβ suppress type errors (Wasm).--no-warnβ suppress all warnings. chaos mode, love that for you π«Ά--nvptx-sched4regβ NVPTX specific: schedule for register pressue. (again, exact spelling, we keep it.)--pgo-block-coverageβ use this option to enable basic block coverage instrumentation.--pgo-temporal-instrumentationβ use this option to enable temporal instrumentation.--pgo-view-block-coverage-graphβ create a dot file of CFGs with block coverage inference information. β¨ dot files, so aesthetic.--poison-checking-function-localβ check that returns are non-poison (for testing).--print-pipeline-passesβ print a-passescompatible string describing the pipeline (best-effort only).--r600-ir-structurizeβ useStructurizeCFGIR pass.--riscv-add-build-attributesβ no description, just here. πΈ--runtime-counter-relocationβ enable relocating counters at runtime.--safepoint-ir-verifier-print-onlyβ no description given. π--sample-profile-check-record-coverage=<N>β emit a warning if less than N% of records in the input profile are matched to the IR.--sample-profile-check-sample-coverage=<N>β emit a warning if less than N% of samples in the input profile are matched to the IR.--sample-profile-max-propagate-iterations=<uint>β maximum number of iterations to go through when propagating sample block/edge weights through the CFG.--sanitizer-early-opt-epβ insert sanitizers onOptimizerEarlyEP.--skip-ret-exit-blockβ suppress counter promotion if exit blocks containret.--speculative-counter-promotion-max-exiting=<uint>β the max number of exiting blocks of a loop to allow speculative counter promotion.--speculative-counter-promotion-to-loopβ when the option is false, if the target block is in a loop, the promotion will be disallowed unless the promoted counter update can be further/iteratively promoted into an acyclic region.--summary-file=<string>β the summary file to use for function importing.--sve-tail-folding=<string>β control the use of vectorisation using tail-folding for SVE, where the option is specified in the form(Initial)[+(Flag1|Flag2|...)]:disabledβ (Initial) no loop types will vectorize using tail-folding.defaultβ (Initial) uses the default tail-folding settings for the target CPU.allβ (Initial) all legal loop types will vectorize using tail-folding.simpleβ (Initial) use tail-folding for simple loops (not reductions or recurrences).reductionsβ use tail-folding for loops containing reductions.noreductionsβ inverse of above.recurrencesβ use tail-folding for loops containing fixed order recurrences.norecurrencesβ inverse of above.reverseβ use tail-folding for loops requiring reversed predicates.noreverseβ inverse of above.
--tail-predication=<value>β MVE tail-predication pass options.=disabledβ don't tail-predicate loops.=enabled-no-reductionsβ enable tail-predication, but not for reduction loops.=enabledβ enable tail-predication, including reduction loops.=force-enabled-no-reductionsβ enable tail-predication, but not for reduction loops, and force this which might be unsafe. π=force-enabledβ enable tail-predication, including reduction loops, and force this which might be unsafe. π
--thinlto-assume-mergedβ assume the input has already undergone ThinLTO function importing and the other pre-optimization pipeline changes.--threads=<int>β no description given. π--type-based-intrinsic-costβ calculate intrinsics cost based only on argument types.--verify-region-infoβ verify region info (time consuming).--vp-counters-per-site=<number>β the average number of profile counters allocated per value profiling site.--vp-static-allocβ do static counter allocation for value profiler.--wasm-enable-ehβ WebAssembly exception handling.--wasm-enable-sjljβ WebAssemblysetjmp/longjmphandling.--x86-align-branch=<string>β specify types of branches to align (plus separated list of types):jccβ indicates conditional jumps.fusedβ indicates fused conditional jumps.jmpβ indicates direct unconditional jumps.callβ indicates direct and indirect calls.retβ indicates rets.indirectβ indicates indirect unconditional jumps.
--x86-align-branch-boundary=<uint>β control how the assembler should align branches with NOP. If the boundary's size is not 0, it should be a power of 2 and no less than 32. Branches will be aligned to prevent from being across or against the boundary of specified size. The default value 0 does not align branches.--x86-branches-within-32B-boundariesβ align selected instructions to mitigate negative performance impact of Intel's micro code update for errata skx102.
β οΈ May break assumptions about labels corresponding to particular instructions, and should be used with caution. bestie, read that again. caution.
--x86-pad-max-prefix-size=<uint>β maximum number of prefixes to use for padding.
π Generic Options π
--helpβ display available options (--help-hiddenfor more).--help-listβ display list of available options (--help-list-hiddenfor more).--versionβ display the version of this program.
π¦ Polly Options π¦
Configure the polly loop optimizer.
--pollyβ enable the polly optimizer (with-O1,-O2or-O3).--polly-2nd-level-tilingβ enable a 2nd level loop of loop tiling.--polly-ast-print-accessesβ print memory access functions.--polly-context=<isl parameter set>β extra constraints on the context parameters, bestie. Just drop them in π--polly-dce-precise-steps=<int>β the number of precise steps hanging out between two approximating iterations. And if you set it to-1? It schedules another approximation stage before the actual dead code elimination even happens. Iconic behavior fr.--polly-delicm-max-ops=<int>β max number of isl operations you're willing to invest in lifetime analysis.0means no limit at all, go feral π«Ά--polly-detect-full-functionsβ lets the detection of full functions happen. periodt.--polly-dump-afterβ dumps the module after Polly transformations into a file suffixed with"-after".--polly-dump-after-file=<string>β dumps the module after Polly transformations to the file you literally name here.--polly-dump-beforeβ dumps the module before Polly transformations into a file suffixed with"-before".--polly-dump-before-file=<string>β dumps the module before Polly transformations straight to the given file.--polly-enable-simplifyβ simplifies the SCoP after optimizations β¨--polly-ignore-func=<string>β ignores functions matching a regex. Multiple regexes? Comma separate them, queen. Scop detection will ignore every function that matches ANY of the regexes you handed over.--polly-isl-arg=<argument>β an option passed to ISL. that's it, that's the tweet.--polly-matmul-optβ performs optimizations of matrix multiplications based on pattern matching π§--polly-on-isl-error-abortβ aborts if an isl error is encountered. no chill, no mercy π--polly-only-func=<string>β only runs on functions matching a regex. Multiple regexes get comma separated, and scop detection will run on all functions that match ANY of the regexes provided.--polly-only-region=<identifier>β only runs on certain regions (the provided identifier must appear in the name of the region's entry block--polly-only-scop-detectionβ runs scop detection only, no other optimizations. just a lil peek π--polly-optimized-scopsβ Polly dumps the polyhedral description of Scops optimized with the isl scheduling optimizer, and the set of post-scheduling transformations is applied on the schedule tree.--polly-parallelβ generates thread parallel code (isl codegen only).--polly-parallel-forceβ forces generation of thread parallel code, ignoring any cost model. main character energy, honestly.--polly-pattern-matching-based-optsβ performs optimizations based on pattern matching π₯--polly-postoptsβ applies post-rescheduling optimizations such as tiling (requires-polly-reschedule).--polly-pragma-based-optsβ applies user-directed transformation from metadata.--polly-pragma-ignore-depcheckβ skips the dependency check for pragma-based transformations. living dangerously, i respect it π--polly-process-unprofitableβ processes scops that are unlikely to benefit from Polly optimizations.--polly-register-tilingβ enables register tiling β--polly-reportβ prints information about the activities of Polly.--polly-rescheduleβ optimizes SCoPs using ISL.--polly-showβ highlights the code regions that will be optimized in a (CFG BBs and LLVM-IR instructions).--polly-show-onlyβ highlights the code regions that will be optimized in a (CFG only BBs).--polly-stmt-granularity=<value>β the algorithm used for splitting basic blocks into multiple statements:=bbβ one statement per basic block=scalar-indepβ scalar independence heuristic=storeβ store-level granularity
--polly-tc-optβ performs optimizations of tensor contractions based on pattern matching π--polly-tilingβ enables loop tiling πΈ--polly-vectorizer=<value>β selects the vectorization strategy:=noneβ no Vectorization=stripmineβ strip-mine outer loops for the loop-vectorizer to trigger
okay bestie that's the whole page, every last Polly flag accounted for, no cap π that was <rainbow>clang-repl 17</rainbow>, dated June 2025 β go forth and optimize, you absolute icon ππ
π¦ where this page comes from
- debian trixie: clang-tools-17 1:17.0.6-22+b2 Β· APACHE-2-LLVM-EXCEPTIONS
- ubuntu questing: clang-tools-17 1:17.0.6-22build1
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash on : a language model's rewrite of the original, under its terms