CLANG-REPL(1)
π clang-repl β the manual page, but make it make sense π
okay so bestie, welcome to clang-repl, from the User Commands corner of your manual, version 13. It's the interactive REPL for Clang and she is iconic. Let's get into it, no cap. π¦
β¨ NAME β¨
clang-repl β manual page for clang-repl 13 π
πΈ DESCRIPTION πΈ
Here's how you actually run her:
USAGE: clang-repl [options] [code to run]
Like, you give her options, you give her code to run, and she does the thing. Simple. Periodt. β¨
OPTIONS:
π Color Options π
The aesthetic section. We love her.
--colorβ use colors in output, bestie π (default=autodetect β she'll figure out the vibe check on her own)
π General options π
This is the big one. Grab a snack, this list is long. π
--Xcc=<string>β an argument to pass straight through to theCompilerInvocationπ«Ά--aarch64-neon-syntax=<value>β pick which style of NEON code to emit from the AArch64 backend:=genericβ emit generic NEON assembly=appleβ emit Apple-style NEON assembly
--aarch64-use-aaβ enable the use of AA during codegen. π₯--abort-on-max-devirt-iterations-reachedβ abort when the max iterations for the devirtualization CGSCC repeat pass is reached. Like, she will literally give up. π--addrsigβ emit an address-significance table--allow-ginsert-as-artifactβ allowG_INSERTto be considered an artifact. It's a hack around AMDGPU test infinite loops, iykyk. π--amdgpu-bypass-slow-divβ skip 64-bit divide for dynamic 32-bit values--amdgpu-disable-loop-alignmentβ do not align and prefetch loops--amdgpu-disable-power-schedβ disable scheduling to minimize mAI power bursts--amdgpu-dpp-combineβ enable DPP combiner--amdgpu-dump-hsa-metadataβ dump AMDGPU HSA Metadata--amdgpu-enable-flat-scratchβ use flat scratch instructions--amdgpu-enable-merge-m0β merge and hoist M0 initializations--amdgpu-promote-alloca-to-vector-limit=<uint>β maximum byte size to consider for promote alloca to vector--amdgpu-reserve-vgpr-for-sgpr-spillβ allocates one VGPR for future SGPR Spill--amdgpu-sdwa-peepholeβ enable SDWA peepholer--amdgpu-use-aa-in-codegenβ enable the use of AA during codegen. π₯--amdgpu-verify-hsa-metadataβ verify AMDGPU HSA Metadata--amdgpu-vgpr-index-modeβ use GPR indexing mode instead of movrel for vector indexing--arm-add-build-attributesβ (no description, she's mysterious π )--arm-implicit-it=<value>β allow conditional instructions outside of an IT block:=alwaysβ accept in both ISAs, emit implicit ITs in Thumb=neverβ warn in ARM, reject in Thumb=armβ accept in ARM, reject in Thumb=thumbβ warn in ARM, emit implicit ITs in Thumb
--asm-show-instβ emit internal instruction representation to the assembly file--atomic-counter-update-promotedβ do counter update using atomic fetch add for promoted counters only--atomic-first-counterβ use atomic fetch add for the first counter in a function (usually the entry counter)--basic-block-sections=<all | <function list (file)> | labels | none>β emit basic blocks into separate sections--bounds-checking-single-trapβ use one trap block per function--cfg-hide-cold-paths=<number>β hide blocks with relative frequency below the given value--cfg-hide-deoptimize-pathsβ (no description, just vibes β¨)--cfg-hide-unreachable-pathsβ (no description either, she's keeping it lowkey)--code-model=<value>β choose your code model:=tinyβ tiny code model=smallβ small code model=kernelβ kernel code model=mediumβ medium code model=largeβ large code model
--cost-kind=<value>β the target cost kind:=throughputβ reciprocal throughput=latencyβ instruction latency=code-sizeβ code size=size-latencyβ code size and latency
--data-sectionsβ emit data into separate sections--debug-entry-valuesβ enable debug info for the debug entry values. π--debugger-tune=<value>β tune debug info for a particular debugger:=gdbβ gdb=lldbβ lldb=dbxβ dbx=sceβ SCE targets (e.g. PS4)
--debugify-level=<value>β the kind of debug info to add:=locationsβ locations only=location+variablesβ locations and variables
--debugify-quietβ suppress verbose debugify output π€«--denormal-fp-math=<value>β select which denormal numbers the code is permitted to require:=ieeeβ IEEE 754 denormal numbers=preserve-signβ the sign of a flushed-to-zero number is preserved in the sign of 0=positive-zeroβ denormals are flushed to positive zero
--denormal-fp-math-f32=<value>β same deal, but select which denormal numbers the code is permitted to require for float:=ieeeβ IEEE 754 denormal numbers=preserve-signβ the sign of a flushed-to-zero number is preserved in the sign of 0=positive-zeroβ denormals are flushed to positive zero
--disable-i2p-p2i-optβ disables the inttoptr/ptrtoint roundtrip optimization--disable-promote-alloca-to-ldsβ disable promote alloca to LDS--disable-promote-alloca-to-vectorβ disable promote alloca to vector--disable-tail-callsβ never emit tail calls--do-counter-promotionβ do counter register promotion--dot-cfg-mssa=<file name for generated dot file>β file name for the generated dot file--dwarf-version=<int>β dwarf version--dwarf64β generate debugging info in the 64-bit DWARF format--emit-call-site-infoβ emit call site debug information, if debug information is enabled.--emscripten-cxx-exceptions-allowed=<string>β the list of function names in which Emscripten-style exception handling is enabled (see emscriptenEMSCRIPTEN_CATCHING_ALLOWEDoptions)--emulated-tlsβ use emulated TLS model--enable-cse-in-irtranslatorβ should enable CSE in irtranslator--enable-cse-in-legalizerβ should enable CSE in Legalizer--enable-emscripten-cxx-exceptionsβ WebAssembly Emscripten-style exception handling--enable-emscripten-sjljβ WebAssembly Emscripten-style setjmp/longjmp handling--enable-gvn-hoistβ enable the GVN hoisting pass (default = off)--enable-gvn-memdepβ (no description, she said nothing and left π«₯)--enable-gvn-sinkβ enable the GVN sinking pass (default = off)--enable-load-in-loop-preβ (no description)--enable-load-preβ (no description)--enable-loop-simplifycfg-term-foldingβ (no description)--enable-name-compressionβ enable name/filename string compression--enable-no-infs-fp-mathβ enable FP math optimizations that assume no +-Infs--enable-no-nans-fp-mathβ enable FP math optimizations that assume no NaNs--enable-no-signed-zeros-fp-mathβ enable FP math optimizations that assume the sign of 0 is insignificant--enable-no-trapping-fp-mathβ enable setting the FP exceptions build attribute not to use exceptions--enable-split-backedge-in-load-preβ (no description)--enable-unsafe-fp-mathβ enable optimizations that may decrease FP precision. Be careful bestie. π--exception-model=<value>β exception model:=defaultβ default exception handling model=dwarfβ DWARF-like CFI based exception handling=sjljβ SjLj exception handling=armβ ARM EHABI exceptions=winehβ Windows exception model=wasmβ WebAssembly exception handling
--execute-concurrency=<uint>β the number of threads used to process all files in parallel. Set to0for hardware concurrency. This flag only applies to all-TUs. π§΅--executor=<string>β the name of the executor to use.--experimental-debug-variable-locationsβ use experimental new value-tracking variable locations π§ͺ--fatal-warningsβ treat warnings as errors π--filetype=<value>β choose a file type (not all types are supported by all targets):
and that's where part 1 stops, bestie β she's still goingβ¦ π¦
okay so these next three are still values for that option from up top, not new flags, don't @ me:
=asmβ emits an assembly'.s'file β¨=objβ emits a native object'.o'file π=nullβ emits literally nothing, it's purely for performance testing π«₯
--filter=<string>β only processes files that match this filter. heads up bestie, this flag only applies to all-TUs. all-TUs and nothing else.--float-abi=<value>β picks the float ABI type π§=defaultβ whatever the target's default float ABI type is=softβ soft float ABI (this is what-soft-floatimplies)=hardβ hard float ABI (it uses FP registers, fancy)
--force-dwarf-frame-sectionβ always emit a debug frame section. no skipping. always.--force-opaque-pointersβ forces all pointers to be opaque pointers π--fp-contract=<value>β turns on aggressive formation of fused FP ops π₯=fastβ fuse FP ops whenever it's profitable=onβ only fuse the 'blessed' FP ops=offβ only fuse FP ops when the result won't be affected
--frame-pointer=<value>β specifies the frame pointer elimination optimization=allβ disables frame pointer elimination entirely=non-leafβ disables frame pointer elimination for non-leaf frames=noneβ enables frame pointer elimination
--function-sectionsβ emits functions into separate sections--gpsize=<uint>β Global Pointer Addressing Size. the default size is 8, that's the whole tea β--hash-based-counter-splitβ renames the counter variable of a comdat function based on cfg hash--hot-cold-splitβ enables the hot-cold splitting pass--ignore-xcoff-visibilityβ doesn't emit the visibility attribute for asm in AIX OS, or gives all symbols 'unspecified' visibility in an XCOFF object file--import-all-indexβ imports all external functions in index.--incremental-linker-compatibleβ when you use it with filetype=obj, it emits an object file that can be used with an incremental linker--instcombine-code-sinkingβ enables code sinking--instcombine-guard-widening-window=<uint>β how wide an instruction window to bypass when looking for another guard--instcombine-max-iterations=<uint>β caps the maximum number of instruction combining iterations--instcombine-max-num-phis=<uint>β maximum number of phis to handle in intptr/ptrint folding--instcombine-maxarray-size=<uint>β maximum array size considered when doing a combine--instcombine-negator-enabledβ should we attempt to sink negations? π€--instcombine-negator-max-depth=<uint>β the maximal lookup depth when trying to check viability of negation sinking.--instrprof-atomic-counter-update-allβ makes all profile counter updates atomic (for testing only, don't ship this fr fr)--internalize-public-api-file=<filename>β a file containing a list of symbol names to preserve--internalize-public-api-list=<list>β a list of symbol names to preserve--iterative-counter-promotionβ allows counter promotion across the whole loop nest.--lto-embed-bitcode=<value>β embeds LLVM bitcode in object files produced by LTO π=noneβ do not embed=optimizedβ embed after all the optimization passes=post-merge-pre-optβ embed post merge, but before optimizations
--lto-pass-remarks-filter=<regex>β only records optimization remarks from passes whose names match the given regular expression--lto-pass-remarks-format=<format>β the format used for serializing remarks (default: YAML)--lto-pass-remarks-output=<filename>β output filename for pass remarks--march=<string>β the architecture to generate code for (see--version)--matrix-default-layout=<value>β sets the default matrix layout π§=column-majorβ use column-major layout=row-majorβ use row-major layout
--mattr=<a1,+a2,-a3,...>β target specific attributes (-mattr=helpfor details)--max-counter-promotions=<int>β max number of allowed counter promotions--max-counter-promotions-per-loop=<uint>β max number of counter promotions per loop, so we don't increase register pressure too much--mc-relax-allβ when used with filetype=obj, relaxes all fixups in the emitted object file--mcpu=<cpu-name>β target a specific cpu type (-mcpu=helpfor details)--meabi=<value>β sets the EABI type (the default depends on triple):=defaultβ triple default EABI version=4β EABI version 4=5β EABI version 5=gnuβ EABI GNU
--merror-missing-parenthesisβ errors on missing parenthesis around predicate registers--merror-noncontigious-registerβ errors on register names that aren't contigious--mhvxβ enables Hexagon Vector eXtensions--mhvx=<value>β enables Hexagon Vector eXtensions=v60β build for HVX v60=v62β build for HVX v62=v65β build for HVX v65=v66β build for HVX v66=v67β build for HVX v67=v68β build for HVX v68
--mips-compact-branches=<value>β MIPS specific: compact branch policy.=neverβ do not use compact branches if possible.=optimalβ use compact branches where appropriate (default).=alwaysβ always use compact branches if possible.
--mips16-constant-islandsβ enables mips16 constant islands.--mips16-hard-floatβ enables mips16 hard float.--mir-strip-debugify-onlyβ should mir-strip-debug only strip debug info from debugified modules by default? π--mno-compoundβ disables looking for compound instructions for Hexagon--mno-fixupβ disables fixing up resolved relocations for Hexagon--mno-ldc1-sdc1β expands double precision loads and stores into their single precision counterparts--mno-pairingβ disables looking for duplex instructions for Hexagon--mwarn-missing-parenthesisβ warns for missing parenthesis around predicate registers--mwarn-noncontigious-registerβ warns for register names that arent contigious--mwarn-sign-mismatchβ warns for mismatching a signed and unsigned value--no-deprecated-warnβ suppresses all deprecated warnings--no-discriminatorsβ disables generation of discriminator information.--no-type-checkβ suppresses type errors (Wasm)--no-warnβ suppresses all warnings--no-xray-indexβ doesn't emit the xray_fn_idx section--nozero-initialized-in-bssβ doesn't place zero-initialized symbols into the bss section--nvptx-sched4regβ NVPTX specific: schedule for register pressue--poison-checking-function-localβ checks that returns are non-poison (for testing)--pseudo-probe-for-profilingβ emits pseudo probes for AutoFDO--r600-ir-structurizeβ uses the StructurizeCFG IR pass--rdf-dumpβ (no description given, it's giving mystery π΅οΈ)--rdf-limit=<uint>β (also no description, iconic and silent)--relax-elf-relocationsβ emits GOTPCRELX/REX_GOTPCRELX instead of GOTPCREL on x86-64 ELF--relocation-model=<value>β chooses the relocation model π=staticβ non-relocatable code=picβ fully relocatable, position independent code=dynamic-no-picβ relocatable external references, non-relocatable code=ropiβ code and read-only data relocatable, accessed PC-relative=rwpiβ read-write data relocatable, accessed relative to static base=ropi-rwpiβ a combination of ropi and rwpi
--runtime-counter-relocationβ enables relocating counters at runtime.--safepoint-ir-verifier-print-onlyβ (no description, just vibes)--sample-profile-check-record-coverage=<N>β emits a warning if less than N% of records in the input profile are matched to the IR.--sample-profile-check-sample-coverage=<N>β bestie it will warn you if fewer than N% of the samples in your input profile actually got matched up to the IR. like it's checking if the vibes align π--sample-profile-max-propagate-iterations=<uint>β the max number of iterations it's willing to go through while propagating sample block/edge weights through the CFG. it will not loop forever, she has boundaries π«Ά--skip-ret-exit-blockβ suppresses counter promotion if the exit blocks containret. no promotion if there's a return chilling in there, periodt.--speculative-counter-promotion-max-exiting=<uint>β the max number of exiting blocks of a loop that are allowed for speculative counter promotion. she has a cap ok β¨--speculative-counter-promotion-to-loopβ when this option is false, if the target block is in a loop, the promotion gets disallowed unless the promoted counter update can be further/iteratively promoted into an acyclic region. it's giving "only if you can escape the loop, queen" π--split-machine-functionsβ split out the cold basic blocks from machine functions, based on profile info. bye cold blocks, you're on your own π₯Ά--stack-size-sectionβ emit a section that contains stack size metadata. metadata slay π--stack-symbol-orderingβ order local stack symbols. keep it cute, keep it ordered πΈ--stackrealignβ force-align the stack to the minimum alignment. she is aligned and she is thriving β¨--strict-dwarfβ use strict dwarf. no notes, just strict dwarf π§--summary-file=<string>β the summary file to use for function importing. give her the file, she'll handle the importing π--tail-predication=<value>β MVE tail-predication pass options. the choices are:=disabledβ Don't tail-predicate loops=enabled-no-reductionsβ Enable tail-predication, but not for reduction loops=enabledβ Enable tail-predication, including reduction loops=force-enabled-no-reductionsβ Enable tail-predication, but not for reduction loops, and force this which might be unsafe β οΈ=force-enabledβ Enable tail-predication, including reduction loops, and force this which might be unsafe β οΈ
--tailcalloptβ turnfastcccalls into tail calls by (potentially) changing the ABI. she's changing the ABI, lowkey a big deal π--thinlto-assume-mergedβ assume the input has already undergone ThinLTO function importing and the other pre-optimization pipeline changes. just trust her, ok? π--thread-model=<value>β choose threading model:=posixβ POSIX thread model=singleβ Single thread model
--threads=<int>β no description given in the original, and honestly? mysterious queen behavior π she said nothing and left--tls-size=<uint>β bit size of immediate TLS offsets. tiny but mighty π--unique-basic-block-section-namesβ give unique names to every basic block section. no duplicates allowed, we're all individuals here π--unique-section-namesβ give unique names to every section. same energy, different scope π--use-ctorsβ use.ctorsinstead of.init_array. old-school choice, respect it π«Ά--vec-extabiβ enable the AIX Extended Altivec ABI. AIX girlies rise up π₯--verify-region-infoβ verify region info. and yes, it's time consuming β she warned you, don't be shocked β³--vp-counters-per-site=<number>β the average number of profile counters allocated per value profiling site. averages, bestie β¨--vp-static-allocβ do static counter allocation for value profiler. static > everything rn π--x86-align-branch=<string>β specify types of branches to align, as a plus-separated list of types:jccβ indicates conditional jumpsfusedβ indicates fused conditional jumpsjmpβ indicates direct unconditional jumpscallβ indicates direct and indirect callsretβ indicates retsindirectβ indicates indirect unconditional jumps
--x86-align-branch-boundary=<uint>β control how the assembler should align branches with NOP. if the boundary's size isn't0, it should be a power of 2 and no less than 32. branches get aligned to prevent them from being across or against the boundary of the specified size. and heads up: the default value0does not align branches π«£--x86-branches-within-32B-boundariesβ align selected instructions to mitigate the negative performance impact of Intel's micro code update for errataskx102.
careful bestie β this may break assumptions about labels corresponding to particular instructions, and should be used with caution. β οΈ
--x86-pad-max-prefix-size=<uint>β maximum number of prefixes to use for padding. pad responsibly π--xcoff-traceback-tableβ emit the XCOFF traceback table. table? emitted. iconic π
πΈ Generic Options πΈ
--helpβ display available options (--help-hiddenfor more). she's helpful like that π«Ά--help-listβ display the list of available options (--help-list-hiddenfor more). a list! of options! π--versionβ display the version of this program. know your version, queen π
π Polly Options: Configure the polly loop optimizer π
--pollyβ enable the polly optimizer (with-O1,-O2or-O3). polly said let me in π₯--polly-2nd-level-tilingβ enable a 2nd level loop of loop tiling. tiling but make it layered β¨--polly-ast-print-accessesβ print memory access functions. show me the accesses π--polly-context=<isl parameter set>β provide additional constraints on the context parameters. boundaries, but make them isl π--polly-dce-precise-steps=<int>β the number of precise steps between two approximating iterations. (A value of-1schedules another approximation stage before the actual dead code elimination. β yes, the parenthesis in the original is left open, we are simply reporting it, no cap π--polly-delicm-max-ops=<int>β maximum number of isl operations to invest for lifetime analysis;0= no limit. invest in yourself bestie π--polly-detect-full-functionsβ allow the detection of full functions. full send πΈ--polly-dump-afterβ dump module after Polly transformations into a file suffixed with"-after". after pic incoming πΈ--polly-dump-after-file=<string>β dump module after Polly transformations to the given file. same but you pick the name π--polly-dump-beforeβ dump module before Polly transformations into a file suffixed with"-before". the before pic πΈ--polly-dump-before-file=<string>β dump module before Polly transformations to the given file. before pic, your filename, your rules β¨--polly-enable-simplifyβ simplify SCoP after optimizations. clean it up after the glow-up π§--polly-ignore-func=<string>β ignore functions that match a regex. multiple regexes can be comma separated. Scop detection will ignore all functions that match ANY of the regexes provided. not you, not you, definitely not you π--polly-isl-arg=<argument>β option passed to ISL. hand-delivered π--polly-on-isl-error-abortβ abort if an isl error is encountered. isl error? we're OUT π--polly-only-func=<string>β only run on functions that match a regex. multiple regexes can be comma separated. Scop detection will run on all functions that match ANY of the regexes provided. yes you, and you, come through π--polly-only-region=<identifier>β only run on certain regions (the provided identifier must appear in the name of the region's entry block. β again, original parenthesis left open, we report it faithfully π«Ά--polly-only-scop-detectionβ only run scop detection, but no other optimizations. detection only, no glow-up, we're just looking π--polly-optimized-scopsβ Polly - dump polyhedral description of Scops optimized with the isl scheduling optimizer and the set of post-scheduling transformations is applied on the schedule tree. a whole mouthful and we're saying it with our chest π--polly-parallelβ generate thread parallel code (isl codegen only). threads, parallel, iconic π--polly-parallel-forceβ force generation of thread parallel code ignoring any cost model. cost model said no, we said yes anyway π₯--polly-pattern-matching-based-optsβ perform optimizations based on pattern matching. match the pattern, serve the look β¨--polly-pragma-based-optsβ apply user-directed transformation from metadata. user-directed, as in you directed it, bestie π«΅--polly-process-unprofitableβ process scops that are unlikely to benefit from Polly optimizations. giving unprofitable scops a chance anyway, we love an underdog π--polly-register-tilingβ enable register tiling. tiles for the registers specifically π--polly-reportβ print information about the activities of Polly. what has polly been up to? let's find out π’--polly-showβ highlight the code regions that will be optimized in a (CFG BBs and LLVM-IR instructions). β parenthesis as-is, she's dramatic like that π--polly-show-onlyβ highlight the code regions that will be optimized in a (CFG only BBs). β same energy, CFG only π--polly-stmt-granularity=<value>β algorithm to use for splitting basic blocks into multiple statements:=bbβ One statement per basic block=scalar-indepβ Scalar independence heuristic=storeβ Store-level granularity
--polly-target=<value>β the hardware to target:=cpuβ generate CPU code
--polly-tilingβ enable loop tiling. tiles! β¨--polly-vectorizer=<value>β select the vectorization strategy:=noneβ No Vectorization
=pollyβ the Polly internal vectorizer, doing its lil optimization dance β¨=stripmineβ strip-mines the outer loops so the loop-vectorizer actually gets a chance to trigger π₯ like it's clearing the runway so the plane can take off, iykyk
and that's the whole vibe, bestie β every flag, every pass, all of it π
this page is from clang-repl 13, dated July 2023 β go forth and REPL responsibly π«Άπ
π¦ where this page comes from
- ubuntu jammy: clang-tools-13 1:13.0.1-2ubuntu2.2 Β· APACHE-2-LLVM-EXCEPTIONS
- π girlified by deepseek-ai/DeepSeek-V4.1-Flash on : a language model's rewrite of the original, under its terms